MIPI I3C Total IP Solution

Overview

The MIPI I3CⓇ Total IP solution is a seamless integration of MIPI I3CⓇ controller, MIPI I3CⓇ PHY I/O, and MIPI I3CⓇ software stack. The MIPI I3CⓇ Total IP solution is a simplified, backward compatible with I2C, scalable, and cost-effective interface. In the fast-growing sensor market, Arasan’s MIPI I3CⓇ Total IP solution along with the Total IP solution for MIPI CSI-2 and MIPI DSI-2 enables developers in the Automotive, Mobile, and IoT industries with a complete image sensor and display interface solution. The MIPI I3CⓇ host controller interface features power-efficient operations that help in maximizing the battery life which is ideal for the mobile industry.

 

 

 

 

 

 

Key Features

  • Compliant with MIPI I3C® Specification v1.1
  • Compliant with MIPI I3C® HCI Specification v1.1/v2.0
  • Supports up to 12.5 MHz operation using Push-Pull
  • Open-Drain and Push-pull type transactions (as required)
  • Supports legacy I2C devices
  • Dynamic addressing while supporting Static addressing for Legacy I2C devices
  • Legacy I2C messaging
  • I2C-like Single Data Rate messaging (SDR)
  • Optional High Data Rate messaging modes (HDR)
  • Reception of In-band Interrupt support from the I3C Device Controllers
  • Reception of Hot-Join from newly added I3C Device Controllers
  • Support for Slave reset
  • Support for Multilane Data Transfer
  • Support for Group Addressing
  • Support for Device to Device Tunneling
  • Support for HDR Bulk Transport mode
  • AHB Target Interface for Configuring/Controlling the IP with Interrupt output
  • AXI Interface for Host Controller DMA access
  • Configurable FIFO sizes for PIO, DMA, Command, Response, IBI Queue
  • Independent Clocks for the System interface (AXI, AHB) and the I3C Interface

Block Diagram

MIPI I3C Total IP Solution Block Diagram

Technical Specifications

Short description
MIPI I3C Total IP Solution
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Semiconductor IP