JESD204B UVM VIP

Overview

The vendor provides configurable JESD204B TX/RX verification IP. JESD204B is a Serial Interface for Data Converters which are defined by JEDEC SOLID STATE TECHNOLOGY ASSOCIATION. Our VIP covers Transport and Data link layer functionality of JESD204B. The VIP provides more flexible configuration to user to select their needs like lane,device configuration, data width.

Key Features

  • ADC - TX/RX DAC - TX/RX.
  • Support up to 12.5 Gbps data rate.
  • Support configurable device classification.
  • Support configurable subclass 0/1/2.
  • Support Frame alignment monitor and correction.
  • Support lane synchronization.
  • Support Lane alignment monitor and correction.
  • Support Link configuration.
  • Support Link re-initialization.
  • Support Deterministic Latency.
  • Support 8B/10B encode/decode.
  • Support Application specific control interface (user specific).

Benefits

  • Configurable Option like lane,frame,TX/RX.
  • Supports both multi device configuration.
  • Simple steps to integrate into customer environment

Block Diagram

JESD204B UVM VIP Block Diagram

Deliverables

  • Basic Test Suite.
  • Random Testbench Environment.
  • Encrypted Source Code of VIP.
  • VIP user guide.

Technical Specifications

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Semiconductor IP