High-speed IP core for ChaCha20-Poly1305 AEAD algorithm

Overview

XIP2113H from Xiphera is a high-speed Intellectual Property (IP) core designed for ChaCha20-Poly1305 Authenticated Encryption with Associated Data (AEAD) scheme protecting both confidentiality and authenticity at the same time. The current definitive standard for ChaCha20-Poly1305 is RFC 8439, “ChaCha20 and Poly1305 for IETF Protocols”.

ChaCha20-Poly1305 is a combination of the ChaCha20 stream cipher and Poly1305 message authentication code, both algorithms designed by Daniel J. Bernstein, and it is used an AEAD scheme in multiple protocols, including TLS 1.3.

XIP2113H has been designed for easy integration with FPGA- and ASIC-based designs in a vendor-agnostic design methodology, and the functionality of XIP2113H does not rely on any FPGA manufacturer-specific features.

Key Features

Moderate resource requirements: The entire XIP2113H requires 14928 Adaptive Lookup Modules (ALMs) (Intel Agilex F). Contact sales@xiphera.com for ASIC resource requirements.
Performance: XIP2113H achieves a throughput in the tens of Gbps range, for example 33.75+ Gbps in Intel Agilex F. Even higher throughputs can be achieved with parallel instantiations of XIP2113H.
High Throughput with Short Latency: XIP2113H offers very high throughput for a single stream of data as it is capable to process one 16-byte block per clock cycle after certain initial latency. The length of the initial latency depends on the length of the message and XIP2113H has been carefully optimized to minimize this initial latency.
Constant Latency: The execution time of XIP2113H is independent of the key values and message contents (apart from the message length), and consequently provides full protection against timing-based side-channel attacks.
Standard Compliance: XIP2113H is fully compliant with RFC 8439 “ChaCha20 and Poly1305 for IETF Protocols”.

Benefits

Fully digital design
Portable to any ASIC or FPGA technology
Fully standard compliant
Easy to integrate
Several bus interfaces available
IP core designed in-house at Xiphera
Technical support by the original designers and cryptographic experts

Block Diagram

Applications

TLS 1.3, WireGuard VPN protocol.

Deliverables

Please contact sales@xiphera.com for pricing and your preferred delivery method. XIP2113H can be shipped in a number of formats, including netlist, source code, or encrypted source code.
Additionally, synthesis scripts, a comprehensive testbench, a high-level Python model, and a detailed datasheet including an integration guide are included.

Technical Specifications

Foundry, Node

Any

Maturity

Hardware tested

Availability

Immediate

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