The LTE Baseband Platform enables customers to more easily exploit the advantages of a 100% Xilinx FPGA baseband implementation, by offering a flexible, standards compliant and pre-optimized solution for LTE MIMO encode function.
The 3GPP LTE MIMO Encoder LogiCORE™ IP provides a flexible and highly optimized implementation of the MIMO encoding functions for LTE eNodeB applications, as defined in the 3GPP-LTE specifications. It represents one LogiCORE IP component in the broader LTE Baseband Platform developed by Xilinx.
3GPP LTE MIMO Encoder
Overview
Key Features
- Compliant with 3GPP TS 36.211 Release 9
- Implements layer mapping and pre-coding
- Supports both transmit diversity and space division multiplexing schemes
- Cyclic delay diversity option
- Maximum theoretical throughput supported for systems with up to 20 MHz bandwidth
- Parametrizable input/output data precision
- AXI4-Stream interface facilitates system integration and re-use
- Bit accurate behavioral C model available to accelerate simulations
Technical Specifications
Related IPs
- 3GPP LTE MIMO Decoder
- 3GPP UMTS LTE 3GPP2 cdma2000 1xEV-DV 1xEV-DO 8 state turbo encoder
- 3GPP UMTS LTE 3GPP2 cdma2000 1xEV-DV 1xEV-DO Turbo Decoder with Optional Viterbi Decoder
- 3GPP LTE UL Channel Decoder
- 3GPP LTE DL Channel Encoder
- 3GPP LTE 3GPP2 1xEV-DO Turbo Decoder with Ping Pong Input and Output Memories