The Actt's 16G SerDes IP is a high performance Multi-lane SerDes PHY IP designed for chips that perform high bandwidth data communication while operating at low power consumption.
This IP is a pure analog SERDES IP, which can perform serialization and de- serialization with a dedicate PCS to accomplish application.
Also, for appropriately configuration, it can be work with multi-protocol application, such as SATA/PCIE/USB application or other high speed SERDES system.
16G SerDes in 28nm
Overview
Key Features
- ? Configurable data rate up to 16Gbps
- ? Multiple 8 lanes transceiver
- ? Internal high performance Frac-N PLL, support SSC
- ? 32bit parallel data bus
- ? APB2.0 compatible interface for PMA’s register access
- ? Independent per-lane power down control
- ? Adaptive or programmable 3-tap TX feed forward equalizer(FFE)
- ? Built-in pattern and checker including PRBS (7,23,31) generator
- ? Internal serial loopback
- ? Integrated on-chip differential 100 Ohm termination in TX and RX
- ? Support flip chip Package
Applications
- PCIe, USB, SATA
Technical Specifications
Maturity
Available on request