0.6G - 12.5G Universal SerDes
Key Features
- 0.6Gbps to 12.5Gbps universal SERDES IP
- Support full, 1/2, 1/4 and 1/8 data rate mode
- Support up to 12 TX/RX data lanes with shared PMU
- Fractional PLL for wide data rate range selection
- 32bit/40bit selectable parallel data bus
- Independent channel power down control
- Programmable transmit amplitude
- Three taps configurable FFE up to 10dB boost
- Embedded adaptive receiver linear equalizer
- Perspective DFE module in receiver
- Build in self-test with PRBS and user pattern generation and checking
- Integrated on-die termination
- Support receiver detection
- Support OOB signal generation and detection
- Support 5000ppm Spread Spectrum Clock generation and receiving
- Flexible reference clock frequency range, both single-end and differential
- Do not need any external component
- Eye monitoring facility available
- FCBGA Package support
- ESD: HBM/MM >2000V/200V
- Protocol Support
- CEI 6G&11G SR/MR
- XAUI/CAUI/XAUI
- GPON/EPON/10G EPON/XGPON/XGSPON
- SGMII/HSGMII/QSGMII/USGMII
- XFI
- Serial RapidIO 1.0/2.0/3.0
- CPRI 0.6144G/1.2288G/2.4576G/4.9152G/6.144G/9.8304G
- PCIE Gen1/Gen2/Gen2
Technical Specifications