Vendor: Certus Semiconductor Category: GPIO

1.8V/3.3V I/O Library with ODIO and 5V HPD in TSMC 12nm

A 1.8V/3.3V flip-chip I/O library with 4kV HBM ESD protection, I2C compliant ODIO and Hot-Plug Detect.

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TSMC 12nm FFC View all specifications

Overview

A 1.8V/3.3V flip-chip I/O library with 4kV HBM ESD protection, I2C compliant ODIO and Hot-Plug Detect.

This library is a production-quality, silicon-proven I/O library in TSMC 12nm technology. Supports multi-voltage GPIOs, capable of operating at 1.8V or 3.3V, dynamically selectable at the system level. Also included are various open-drain I/Os and hot plug detects capable of up to 5V operation. The library also includes a wide-variety of low-capacitance RF and analog ESD. There have operating ranges from 0 to 5V protection and support a wide range of high-performance interfaces including HDMI, LVDS, USB and wireless front-ends. Also included is a range of IEC 61000-4-2 system-level ESD protection that supports digital and analog I/O cells.

Operating Conditions

Parameter Value
VDDIO 1.8V or 3.3V Dynamic
Core VDD 0.8V
Tj -40C to 125C

Cell Size and Metal Stack

Cell Size Metal Stack
GPIO 30x50um 1P8M

Library Cell Summary

Cell Type Feature
1.8V GPIO 425 MHz @ 5pF
3.3V GPIO 275 MHz @ 5pF
ODIO I2C Compliant
HPD 500kHz for HDMI

Standards

  •  eMMC
  •  I2C Standard, I3C
  •  SPI
  •  Supports a number of additional standards

Key features

  • GPIO Features
    •  1.8V or 3.3V - system selectable and dynamically changeable
    •  4kV HBM protection, +500V CDM protection
    •  Compliant with JESD8C and JESD8A
  • ODIO Features
    •  3.3V to 5V
    •  I2C Compliant
    •  Designed specifically for DDC interface in HDMI standards

Block Diagram

AF12 block diagram

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Silicon Options

Foundry Node Process Maturity
TSMC 12nm FFC —

Specifications

Identity

Part Number
AF12
Vendor
Certus Semiconductor
Type
Silicon IP

Provider

Certus Semiconductor
HQ: United States
Certus Semiconductor has assembled several of the world’s foremost experts in IO and ESD design to offer our clients the ability to affordably tailor their IO libraries into the optimal fit for their products. Certus is offering the semiconductor industry a unique approach to custom IO libraries, including tailored IO designs, and ESD solutions based on simulations leveraging specialized silicon ESD models. In addition to offering fast turnaround custom IO designs, Certus offers independent ESD design, review and debug services. Through partnerships, Certus is also able to provide ESD testing & TLP support.
Contact Certus Semiconductor

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Frequently asked questions about GPIO Pad Library IP cores

What is 1.8V/3.3V I/O Library with ODIO and 5V HPD in TSMC 12nm?

1.8V/3.3V I/O Library with ODIO and 5V HPD in TSMC 12nm is a GPIO IP core from Certus Semiconductor listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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