AHB-Lite General Purpose Memory Module
The Roa Logic AHB-Lite Memory IP is a fully parameterized soft IP implementing on-chip memory for access by an AHB-Lite based Mas…
The Roa Logic AHB-Lite APB4 Bridge is a fully parameterized soft IP interconnect bridge between the AMBA 3 AHB-Lite v1.0 and AMBA…
RISC-V Compliant Platform Level Interrupt Controller
Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a use…
The Roa Logic AHB-Lite Timer IP is a fully parameterized soft IP implementing a user-defined number of timers and functions as sp…
APB4 General Purpose Input/Output Module
The APB4 GPIO Core is fully parameterised core designed to provide a user-defined number of general purpose, bidirectional IO to …
The AMBA APB v2.0 bus protocol – commonly referred to as APB4 – defines a low-cost interface that is optimized for minimal power …
The Roa Logic AHB-Lite Multi-layer Interconnect is a fully parameterized High Performance, Low Latency Interconnect Fabric soft I…
RISC-V Processor - RV12 - 32/64 bit, Single Core CPU
The RV12 is a configurable single-issue, single-core RV32I, RV64I compliant RISC CPU intended for the embedded market.
The 8b10b line code is widely used to achieve DC-balance and bounded disparity when transmitting serial data over a medium.