Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
Maximum performance for running Linux high-end applications.
- CPU
Gen#2 of 64-bit RISC-V core with out-of-order pipeline based complex
Maximum performance for running Linux high-end applications.
64-bit RISC-V core with in-order single issue pipeline based complex.
64-bit RISC-V high-performance embedded core
64-bit RISC-V high-performance embedded core.
32-bit RISC-V compact high-performance embedded core
32-bit RISC-V compact high-performance embedded core.
64-bit RISC-V core with in-order dual issue pipeline based complex for Linux-based systems
64-bit RISC-V core with in-order dual issue pipeline based complex.
64-bit RISC-V microcontroller. Small core for 64-bit applications.
64-bit RISC-V core.
64-bit RISC-V core with out-of-order pipeline based complex for Linux-based embedded systems
64-bit RISC-V core with out-of-order pipeline based complex.
64-bit RISC-V core with in-order dual issue pipeline based complex for Linux-based systems
64-bit RISC-V core with in-order dual issue pipeline based complex.
32-bit RISC-V core with in-order single issue pipeline for Linux-based systems
32-bit RISC-V core with in-order pipeline.
32-bit RISC-V microcontroller.
64-bit RISC-V embedded core with in-order single issue pipeline
64-bit RISC-V embedded core with in-order single issue pipeline.
32-bit RISC-V embedded core with in-order single issue pipeline
32-bit RISC-V embedded core with in-order single issue pipeline.