ChipCraft IP Cores

The CC-AES-AXI is a synthesisable Verilog model of a Encryption Standard module.

• Symmetric Crypto
• Now
• AXI4-Lite

The CC-AES-APB is a synthesisable Verilog model of a Encryption Standard module.

• Symmetric Crypto
• Now
• APB

The CC-GPIO-AXI is a synthesisable Verilog model of a General Purpose Input/Output Controller.

• GPIO
• Now
• AXI4-Lite

The CC-GPIO-APB is a synthesisable Verilog model of a General Purpose Input/Output Controller.

• GPIO
• Now
• APB

The CC-WDT-AXI is a synthesisable Verilog model of a watchdog timer controller.

• Timers & Watchdogs
• Now
• AXI4-Lite

The CC-WDT-APB is a synthesisable Verilog model of a watchdog timer controller.

• Timers & Watchdogs
• Now
• APB

The CC-SYSTICK-AXI is a synthesisable Verilog model of a system tick timer counter controller.

• Timers & Watchdogs
• Now
• AXI4-Lite

The CC-SYSTICK-APB is a synthesisable Verilog model of a system tick timer counter controller.

• Timers & Watchdogs
• Now
• APB

The CC-TIMER-AXI is a synthesisable Verilog model of a timer counter controller.

• Timers & Watchdogs
• Now
• AXI4-Lite

The CC-TIMER-APB is a synthesisable Verilog model timer counter controller.

• Timers & Watchdogs
• Now
• APB

The CC-PDMA-AXI-AXI is a synthesisable Verilog model of a peripheral direct memory access controller.

• DMA
• Now
• AXI4, AXI4-Lite

The CC-PDMA-APB-AHB is a synthesisable Verilog model of a peripheral direct memory access controller.

• DMA
• Now
• AHB-Lite, APB

The CC-UART-AXI is a synthesisable Verilog model of a UART serial interface controller.

• UART
• AXI4-Lite

The CC-UART-APB is a synthesisable Verilog model of a UART serial interface controller.

• UART
• APB

The CC-SPI-AXI is a synthesisable Verilog model of a SPI serial peripheral interface Master/Slave controller.

• SPI / QSPI XSPI
• Now
• AXI4-Lite

The CC-I2C_MST-AXI is a synthesisable Verilog model of a I2C serial interface controller.

• I2C / I3C
• Now
• AXI4-Lite

The CC-SPI-APB is a synthesisable Verilog model of a SPI serial peripheral interface Master/Slave controller.

• SPI / QSPI XSPI
• Now
• APB

The CC-I2C_MST-APB is a synthesisable Verilog model of a I2C serial interface controller.

• I2C / I3C
• Now
• APB

HealthIP™ is targeting portable health monitoring (telehealth/telemedicine) and wearable health monitoring devices.

• Mixed Signal Subsystem
• Silicon proven
• Now

The CCRV32ST-S is a synthesisable Verilog model of a high performance 32-bit RV32GC System-on-Chip.

• CPU
• Now
• AXI4, AXI4-Lite, AHB-Lite, …