Chip Interfaces ApS
•
HQ:
Denmark
Industry , AXI5-Stream Solution for UCIe D2D Stacks The AXI-S Protocol Layer for UCIe is a protocol adapter layer between a Strea…
- UCIe
Compare 24 Chip Interfaces ApS IP Cores from 1 vendors
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Chip Interfaces ApS• HQ: Denmark
Early adopter version of the upcoming revision of the JEDEC standard for Serial Interface for Data Converters The JESD204E Contro…
- JESD204
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Chip Interfaces ApS• HQ: Denmark
Silicon agnostic and fully compliant Physical Coding Sublayer (PCS) implementation of UALink_200 specification The UA Link PCS IP…
- UALink
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Chip Interfaces ApS• HQ: Denmark
scalable and silicon agnostic implementation of the interoperable O-RAN WG4 defined 7.2x interface ORAN IP core is a scalable and…
- Cellular
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Chip Interfaces ApS• HQ: Denmark
scalable and silicon-agnostic implementation of the MIPI Camera Serial Interface 2 version 4.1 The MIPI CSI-2 IP core is a scalab…
- MIPI
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Chip Interfaces ApS• HQ: Denmark
Silicon agnostic, scalable implementation of IEEE-ISTO Std 4900-2021 The DiFi IP core is a scalable and silicon agnostic implemen…
- Optical Transport
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Chip Interfaces ApS• HQ: Denmark
Size optimized, silicon agnostic IP core suitable for line rates upto 25G eCPRI core is a scalable and silicon agnostic implement…
- CPRI
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Chip Interfaces ApS• HQ: Denmark
mature, silicon proven and silicon agnostic IP core conforming to CPRI 7.0 specifications The Common Public Radio Interface (CPRI…
- CPRI
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Chip Interfaces ApS• HQ: Denmark
Well established, field proven and silicon agnostic IP core conforming to CPRI 6.1 specifications Common Public Radio Interface (…
- CPRI
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Chip Interfaces ApS• HQ: Denmark
Industry , Silicon Proven, 32 Gbps per pin, backed by a portfolio of verification tools, PHY interoperability and integration.
- UCIe
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Chip Interfaces ApS• HQ: Denmark
This JESD204 Verification IP provides an and efficient solution for verifying and debugging these standards in a UVM simulation e…
- JESD204
- Mature
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Chip Interfaces ApS• HQ: Denmark
The MIPI I3C Controller IP is a optimized and technology agnostic implementation of the MIPI I3C v.1.1.1 standard targeting both …
- I2C / I3C
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Chip Interfaces ApS• HQ: Denmark
The MIPI I3C Controller IP is a optimized and technology agnostic implementation of the MIPI I3C v.1.1.1 standard targeting both …
- I2C / I3C
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Chip Interfaces ApS• HQ: Denmark
The MIPI I3C Controller IP is a optimized and technology agnostic implementation of the MIPI I3C v.1.1.1 standard targeting both …
- I2C / I3C
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Chip Interfaces ApS• HQ: Denmark
Wide range of dedicated, high performance, low latency RS FEC IP cores to meet any error correction requirement The Reed Solomon …
- Channel Coding
- Yes
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Chip Interfaces ApS• HQ: Denmark
The MIPI RFFE Master controller IP is a optimized and technology agnostic implementation of the MIPI RFFE v.3.1 standard targetin…
- MIPI RFFE
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Chip Interfaces ApS• HQ: Denmark
World-class, industry-, scalable, silicon- and PHY-agnostic IP core with 116 Gbps line rate, interoperability tested with Serdes …
- Interlaken
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Chip Interfaces ApS• HQ: Denmark
Industry , Silicon Proven, 32.5 Gbps per lane IP core, backed by a portfolio of verification tools, PHY interop, and hardware dem…
- JESD204
- Mature
- Available
- JEDEC JESD204C
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Chip Interfaces ApS• HQ: Denmark
Silicon agnostic and fully compliant implementation of UALink_200 specification The Chip Interfaces UA Link TL IP Core is a high-…
- UALink
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Chip Interfaces ApS• HQ: Denmark
Silicon agnostic and fully compliant implementation of UALink_200 specification The UA Link DL IP Core is a high-performance, sil…
- UALink