Vendor: OPENEDGES Technology, Inc. Category: UCIe

UCIe Die-to-Die Chiplet Controller

The UCIe Controller IP is a configurable and customizable UCIe 1.1 compliant die-to-die controller.

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Overview

The UCIe Controller IP is a highly configurable and customizable UCIe 1.1 compliant die-to-die controller. It extends on-chip AXI interconnections to multi-die connections, providing an advanced solution for multi-die connectivity across various applications. The controller uses flits, which are flow control units that are both reliable and latency-optimized. In addition, OUC ensures that the receiver buffer does not overflow at the receiver end. With its well-defined AXI packet structure, the OUC seamlessly matches AXI parameters with its link partner, ensuring smooth format matching and communication even with different AXI parameters. OUC matches the protocol using padding and cropping with default operation rules defined in AXI.

This UCIe chiplet brings highly customizable, package-level integration with die-to-die interconnect and protocol connections, creating an interoperable, multi-vendor ecosystem, and establishing a new industry standard for universal interconnect at the package level.

Key features

  • AXI over UCIe Streaming Protocol
    • High configurability and customizability
    • Defines packets to communicate with a link partner using different AXI parameters
    • Supports raw streaming modes
    • Provides various Flit formats in UCIe v1.1 (filt format 2: 68B flit format, flit format 3/4: standard 256B flit format, and flit format 5/6: latency optimized 256B flit format)
  • Link Error Detection and Retry Feature
    • Implements CRC and retry mechanisms
    • Handles parity error effectively
  • APB for Controller Control
    • Manages parameter setup
    • Controls link operations
    • Facilitates test and debug processes

Block Diagram

OUC block diagram

Benefits

  • Configurability
    • AXI interface including widths and signals
    • RDI/FDI data width (32byte/16byte)
    • Flit format
    • Address map
  • Simulation Model
    • Supports host bus integration
    • Includes software layer for UCIe controller
    • Facilitates Design Space Exploration (DSE) for UCIe switching fabric
    • Enables traffic generation for performance estimation
  • High Operation Frequency
    • Achieves 1+GHz operating frequency on SEC 5nm automotive process
    • Configured with 32B FDI/RDI data width
  • Verification Environment
    • Features UCIe controller loop-back environment with traffic generator and checker for on-chip validation
    • Integrates UCIe Controller and PHY

Applications

  • Automotive
  • Ai accelerators
  • AI/ML
  • high computing and servers, etc

What’s Included?

  • OUC is packaged with the following items to all eligible companies:
    • IP core RTL
    • Standalone Simulation Environment
    • Management SW
    • IP Documentation

Specifications

Identity

Part Number
OUC
Vendor
OPENEDGES Technology, Inc.

Provider

OPENEDGES Technology, Inc.
HQ: Korea
OPENEDGES is an IP technology provider for Smart Computing enabling Internet of Smart Things. OPENEDGES delivers IPs in two key technology areas in Smart Computing; 1) Artificial Intelligence (Deep Learning) Accelerator and 2) Memory Subsystem IP. For Memory Subsystem, we provide Memory Controller IP (OMC), LPDDR5x/5/4 PHY & High speed Network on-chip interconnect IP (OIC). OPENEDGES is the only IP company providing DDR controller, DDR PHY IP & High speed NoC bus interconnect IP all together. When used together within an SoC, OMC, OPHY and OIC provide significant synergy of higher performance, reduced SoC design efforts and a lot easier post-silicon debugging/tuning. And our Artificial Intelligence Accelerator (ENLIGHT) features higher compute density & low-power consumption through our unique bit-precision optimization technology. ENLIGHT and our Memory system IP gives synergy of high efficiency for performance demanding Artificial Intelligence acceleration task. Our IPs are silicon proven and market proven with many Tier 1 semiconductor companies.
Contact OPENEDGES Technology, Inc.

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Frequently asked questions about UCIe IP cores

What is UCIe Die-to-Die Chiplet Controller?

UCIe Die-to-Die Chiplet Controller is a UCIe IP core from OPENEDGES Technology, Inc. listed on Semi IP Hub.

How should engineers evaluate this UCIe?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this UCIe IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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