28nm UMC IO Pad IP Listing

The DDR4 multiPHY IP cores are mixed-signal PHY IP cores that supply the physical interface to JEDEC standard DDR4, DDR3, LPDDR2,…

• UMC
• 28nm
• HPC

The multi-protocol SerDes PHY consists of Serial ATA (SATA) conforming with SATA 3.0 Specification, Peripheral Component Intercon…

• UMC
• 28nm
• HPC
• In Production

The Synopsys IP USB 2.0 femtoPHY provides designers with a physical (PHY) layer IP solution for low-power mobile and consumer app…

• UMC
• 22nm
• ULP
• Available on request

The Synopsys USB 2.0 picoPHY provides designers with a physical (PHY) layer IP solution, designed for low power mobile and consum…

• UMC
• 28nm
• LP
• Available on request