Vendor: Rambus, Inc. Category: PCI Express

PCIe 7.0 Controller with AXI

The PCI Express® (PCIe®) 7.0 Controller with AXI is a configurable and scalable design for ASIC implementations.

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Overview

The PCI Express® (PCIe®) 7.0 Controller with AXI is a configurable and scalable design for ASIC implementations. Optimized for high-bandwidth efficiency at data rates up to 128 GT/s, the controller delivers maximum performance for Data Center, Edge, AI/ML and HPC applications. It is backward compatible to the PCIe 6.0 and 5.0, as well as version 6.2.1 PHY Interface for PCI Express (PIPE) specification.

Key features

  • Optimized for high-bandwidth efficiency at data rates up to 128 GT/s
  • Separate native TX/RX data path separating posted/Non posted/completion traffic
  • Handles up to 4 TLPs per cycle
  • Advanced PIPE modes and port bifurcation
  • Supports multiple virtual channels
  • Supports Endpoint, Root-Port, Dual-mode, Switch port configurations
  • Advanced RAS features
  • Optional IDE security with AES-GCM encryption, decryption and authentication
  • Supports AMBA AXI interconnect

Block Diagram

PCIe 7.0 Controller with AXI block diagram

What’s Included?

  • IP Files
    • Verilog RTL source code
    • Libraries for functional simulation
    • Configuration assistant GUI (Wizard)
  • Full Documentation
  • Reference Designs
    • Synthesizable Verilog RTL source code
    • Simulation environment and test scripts
    • Synthesis project and DC constraint files (ASIC)

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
PCIe 7.0 Controller with AXI
Vendor
Rambus, Inc.

Provider

Rambus, Inc.
HQ: USA
Rambus delivers industry-leading chips and silicon IP for the data center and AI infrastructure. With over three decades of advanced semiconductor experience, our products and technologies address the critical bottlenecks between memory and processing to accelerate data-intensive workloads. By enabling greater bandwidth, efficiency and security across next-generation computing platforms, we make data faster and safer.
Contact Rambus, Inc.

Learn more about PCI Express IP core

Challenges in PCI Express IP Implementation

IP selection, verification and integration are key aspects to the success of an IP-based design. This paper describes some of the challenges imposed by an IP based implementation of the technology and discusses about possible solutions to address them.

Realizing the Performance Potential of a PCI-Express IP

This paper describes challenges involved in realizing the maximum performance of a configurable interconnect IP (GPEX - Rambus PCI Express Digital Controller). The following sections describe how various performance metrics such as roundtrip latency and bandwidth can be used to characterize a PCI Express IP performance and its impact on the system. The ideas presented can also be applied to other high speed interconnect architectures like RapidIO and Hypertransport

Frequently asked questions about PCIe IP cores

What is PCIe 7.0 Controller with AXI?

PCIe 7.0 Controller with AXI is a PCI Express IP core from Rambus, Inc. listed on Semi IP Hub.

How should engineers evaluate this PCI Express?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PCI Express IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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