High-speed serial IP cores are essential building blocks for advanced SoCs, AI accelerators, networking devices, storage controllers, data center chips, and automotive processors. These IP solutions enable high-bandwidth chip-to-chip, board-to-board, and subsystem interconnects across a wide range of industry standards.
On Semi IP Hub, engineers can discover high-speed serial semiconductor IP covering protocols such as PCI Express, CXL, USB, Ethernet, Interlaken, and other performance-driven connectivity standards. Typical solutions may include PHYs, controllers, protocol stacks, subsystem IP, and interface verification support.
Browse high-speed serial IP cores by protocol family, data rate, implementation type, and vendor offering to identify the right connectivity IP for next-generation ASIC and SoC development.
Sensor / Display MIPI A-PHY Source IP
The CL12911IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking ap…
Sensor/Display MIPI A-PHY Sink IP
The CL12912IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking ap…
Certus is pleased to offer Reduced Gigabit Media Independent Interface (RGMII) compliant IOs in technology nodes.
SLVS-EC TX PHY - 10GBPS 8-Lane - TSMC 12FFC
The CL12811M8TIP10000 TXPHY supports 8 TX DATA lanes for up to 10Gbps application.
The PCI Express® (PCIe®) Controller IP is a configurable, performance-optimized core designed for ASIC and FPGA integration.
The Universal Media Access Controller (UMAC) ensures efficient data flow, low latency, and optimized power usage.
Synchronous Ethernet (SyncE) ESMC and Enhanced ESMC core
NetTimeLogic’s Synchronous Ethernet (SyncE) Node is a full hardware (FPGA) only implementation of an ESMC frame Handler and State…
OSU processor, optimized for E1/FE/GE services with Ethernet over SDH over OTU0/OTU1 lines
The TPS3215MP OSU processor is an IP Core solution designed for Xilinx FPGAs.
FC Upper Layer Protocol (ULP) IP Core
The Fibre Channel Upper Layer Protocol (FC-ULP) core provides a FC-4 layer hardware IP solution for the Fibre Channel Avionics En…
USB 3.1 Gen1 / Gen2 Host Controller IP
USB 3.1 Host Controller is compliance with USB3.1 specification, Revision 1.0 and all associated ECN’s, USB specifications Rev 2.…
DVB-GSE Encapsulator and Decapsulator
The DVB-GSE encapsulator and decapsulator IP cores close the gap between network protocols like Ethernet and the physical layer o…
The PCI Express® (PCIe®) 6.1 Controller is configurable and scalable controller IP designed for ASIC implementation.
The PCIe 2.1 Controller (formerly XpressRICH) is designed to achieve maximum PCI Express (PCIe) 2.1 performance with great design…
The PCIe 2.1 Controller (formerly XpressRICH) is designed to achieve maximum PCI Express (PCIe) 2.1 performance with great design…
The PCIe Switch for USB4 (formerly XpressSWITCH) is a customizable, embedded switch for PCI Express (PCIe) designed for implement…
The Compute Express Link™ (CXL™) 2.0 Controller (formerly XpressLINK) leverages a silicon-proven PCIe 5.0 controller architecture…
The Compute Express Link™ (CXL™) 2.0 Controller (formerly XpressLINK) leverages a silicon-proven PCIe 5.0 controller architecture…
We provide configurable USB 2.0 device controller IP Cores.
Time Sensitive Networking (TSN) Single Port End Node core
The TSN End Node IP core from NetTimeLogic is a standalone Time Sensitive Networking (TSN) single port end node core according to…
Multi Protocol Endpoint IP Core for Safe and Secure Ethernet Network
The CetraC EndSystem IP coreis the ideal solution to link your Avionic Computer System to a safe & secure embedded network as ARI…