Vendor: SmartDV Technologies Category: I2C / I3C

I2C Synthesizable Transactor

I2C Synthesizable Transactor provides a smart way to verify the I2C component of a SOC or a ASIC in Emulator or FPGA platform.

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Overview

I2C Synthesizable Transactor provides a smart way to verify the I2C component of a SOC or a ASIC in Emulator or FPGA platform. I2C Synthesizable Transactor provides an smart way to verify the I2C bi-directional two-wire bus. The SmartDV's I2C Synthesizable Transactor is fully compliant with version 6.0 of the Philip's I2C-Bus Specification and provides the following features.

Key features

  • Supports 6.0 I2C Specification
  • Supports standard, fast, fast mode plus and high speed operations
  • Supports full I2C Master and Slave functionality
  • Operates as a Master, Slave, or both
  • Start, repeat start and stop for all possible transfers
  • Supports all I2C clocking speeds
  • Supports 7b/10b configurable slave address
  • Allows testing of various bus traffic for Read, Write, General Call and CBUS
  • Supports bus arbitration for multi master
  • Supports multiple slaves
  • Supports insertion of wait states by slave and master
  • Supports complex sequence of 7/10 bit with repeated start command sequences
  • Supports Bus-accurate timing
  • Supports START byte generation and handling
  • Supports Master/Slave arbitration and clock synchronization
  • Supports Glitch insertion and detection
  • Supports AT24C1024 EEPROM memory model which supports 256 bytes Page Write Mode
  • Supports Random and Sequential Read Modes
  • Supports injection of various of errors
    • Master aborting in middle of access
    • Master doing ACK on last read access
    • Master continues after NACK from slave for write data
    • Random and Periodic clock period stretching by Slave
    • Random Write NACK insertion by Slave
    • Undersize/Oversize error
    • Glitch injection on clock and data at various windows
  • Compares read data with expected results
  • Supports various kind of Master and Slave errors generation
  • Notifies the testbench of significant events such as transactions, warnings, timing and protocol violations
  • Status counters for various events in bus
  • I2C Synthesizable Transactor comes with complete testsuite to test every feature of I2C specification

Block Diagram

I2C Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactor
  • Complete regression suite containing all the I2C testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation contains User's Guide and Release notes

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
I2C Transactor
Vendor
SmartDV Technologies
Type
Silicon IP

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
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Frequently asked questions about I2C / I3C IP cores

What is I2C Synthesizable Transactor?

I2C Synthesizable Transactor is a I2C / I3C IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this I2C / I3C?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2C / I3C IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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