Vendor: System Level Solutions, Inc. Category: I2C / I3C

I2C Master

Avalon compliant I²C Master IP core provides an interface between Nios II processor and an I²C Slave device.

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Overview

Avalon compliant I²C Master IP core provides an interface between Nios II processor and an I²C Slave device. It can work as a master transmitter or master receiver depending on working mode determined by Nios II processor. The I²C Master IP core incorporates all features required by the latest I²C specification including clock synchronization, arbitration, multi-master systems and fast-speed transmission mode.

The I²C Master IP core is provided as Altera SOPC Builder ready component and integrates easily into any SOPC Builder generated system.

Key features

  • Compatible with Philips I²C standard
  • Two transmission speeds are supported; Normal: 100Kbps Fast: 400Kbps
  • Multi Master Operation
  • Software programmable clock frequency
  • Clock stretching and wait state generation
  • Software programmable acknowledge bit
  • Interrupt or bit-polling driven byte-by-byte data-transfers
  • Arbitration lost interrupt, with automatic transfer cancellation
  • Start/Stop/Repeated Start/Acknowledge generation
  • Start/Stop/Repeated Start detection
  • Bus busy detection
  • Supports 7 and 10bit addressing mode
  • Operates from a wide range of input clock frequencies

Block Diagram

IPRI2CMMFP001 block diagram

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
IPRI2CMMFP001
Vendor
System Level Solutions, Inc.
Type
Silicon IP

Provider

System Level Solutions, Inc.
HQ: USA
With a strong focus on smart energy, industrial IoT, and utility-grade wireless solutions - covering metering, integration of micro generation, field operations, consumer devices, and a cloud-based open-standards for the Internet of Things (IoT) platform, SLS has successfully established as an international technology provider to multiple sectors. SLS has broadened its wings to a global operation across three continents (America, Europe and Asia), which includes more than 250 trained engineering professionals in India and they are responsible for FPGA design, PCB development, prototype development, software development, software applications, and manufacturing. Through long established relationships with organizations such as Altera, Toshiba, Hitachi, Telefonica, Intel, Dell, BHEL and many others, SLS has earned a top-notch reputation as a products and services provider. In recent years, SLS helped the UK governments for developing Smart Cities program by assisting SmartDCC and Telefonica with test products and infrastructure as well as assisting companies like EDMI and Toshiba for communications hubs and smart metering devices. With a unique in-house agile capability to rapid development prototype and proof of concepts covering hardware, firmware, software and wireless - and transition to scale without traditional overheads, SLS is the agile technology product and solution partner of choice for industry.
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Frequently asked questions about I2C / I3C IP cores

What is I2C Master?

I2C Master is a I2C / I3C IP core from System Level Solutions, Inc. listed on Semi IP Hub.

How should engineers evaluate this I2C / I3C?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2C / I3C IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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