Foundation Libraries IP cores help engineering teams evaluate reusable semiconductor IP for advanced chip designs.
This page lets you compare Foundation Library IP offerings from multiple vendors based on functionality, integration requirements, performance targets, power efficiency, and process compatibility.
Programmable Special IO in SMIC0.13um
AR750S13 is a programmable special IO cell supporting various JEDEG standards, such as LVDS, LVTTL, LVCMOS-33/25/18/15, SSTL_3/2/…
The LVDS library provides an LVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 drivers ope…
The SSTL_15 pad set supports bidirectional single-ended and differential SSTL_15 signaling.
SSTL_15 / SSTL_18 Combo I/O Pad Set
The SSTL_15_18 combo pad set supports bidirectional single-ended and differential SSTL_15 and SSTL_18 signaling.
The subLVDS library provides a subLVDS driver, receiver, and temperature stable voltage reference capable of supporting 16 driver…
3.3V Wide-Range General Purpose I/O Pad Set
The 3.3V General Purpose I/O library provides bidirectional I/O, isolated analog I/O, and a full complement of power cells along …
PMK Library IPs at SMIC 40ULP Process
M31 offers a variety of cell libraries, including Ultra-High Density Standard Cell Library (HDSC), General Purpose Standard Cell …
PMK Library IPs at SMIC 40LL Process
M31 offers a variety of cell libraries, including Ultra-High Density Standard Cell Library (HDSC), General Purpose Standard Cell …
LPKT Library IPs at SMIC 40ULP Process
M31 offers a variety of cell libraries, including Ultra-High Density Standard Cell Library (HDSC), General Purpose Standard Cell …
Over-voltage Protection Module to handle direct connection of voltage regulators to a 5V battery using standard 2.5 OD 3.3V devic…
Library of LVDS Ios cells in SMIC 130nm~28nm
This IP is a total solution for LVDS applications, including LVDS transmitter I/O, receiver I/O, common block and power/ground I/…
Duet Package of Embedded Memories and Logic Libraries for SMIC (65nm, 40nm)
The Synopsys Duet Packages of Embedded Memories and Logic Libraries, part of Synopsys Foundation IP portfolio, offer an integrate…
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SMIC 0.13um 3.3V Standard Cell Library, 3.3v operating voltage
SMIC 0.13um 3.3V Standard Cell Library
VeriSilicon SMIC 0.11μm 1.2V/3.3V DUPIO_01 Library
VeriSilicon SMIC 0.11μm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing Inte…
VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V ANALOGIO_DUP_05 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturin…
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library
VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing Int…