Low-Speed 40KHz RC oscillator on SMIC 40nm
The present IP is a low speed and low powerinternal RC oscillator circuit.
- SMIC
- 40nm
- Silicon Proven
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
Low-Speed 40KHz RC oscillator on SMIC 40nm
The present IP is a low speed and low powerinternal RC oscillator circuit.
High Speed 132MHz RC oscillator on SMIC 40nm
The present IP is a high speed Low Power RC oscillator that developed with SMIC 40nm process.
LDO regulator on SMIC 40nm, 0.6~1.1v output
The present IP is a low dropout voltage regulator, which can support 10uA current load.
LDO regulator on SMIC 40nm, 2.1v output
The present IP is a low dropout voltage regulator, which can support 360uA current load.
The present IP is a voltage reference buffer, which is developed with SMIC 65nm ETOX Nor Flash process.
LDO regulator on SMIC 40nm, 1.13v output
The present IP is a low dropout voltage regulator, which can support 10uA DC current load.
LDO regulator on SMIC 40nm, 1.42v output
The present IP is a low dropout voltage regulator, which can support 10uA DC current load.
LDO regulator on SMIC 40nm, up to 12mA
The present IP is a low-dropout (LDO) voltage regulator supporting a 12mA load current with an input voltage range of 2.7V to 3.6…
Capless LDO regulator on SMIC 65nm
The present IP is a low-dropout (LDO) and capacitor-less voltage regulator developed using SMIC's 65nm ETOX Nor Flash process.
Integer-N PLL, 600M-2.4G on SMIC 40nm
This present IP is a self-biased Phase Locked Loop (PLL) circuit, which can cover 600MHz-2.4GHz vco output frequency.
Charge-Pump positive voltage generator with LDO in-built on SMIC 65nm
The present IP is a charge-pump and low dropout voltage generator, which is developed with SMIC 65nm ETOX Nor Flash process.
The present IP is a charge-pump voltage generator developed using SMIC's 65nm ETOX Nor Flash process.
The present IP is a charge-pump voltage generator developed using SMIC's 65nm ETOX Nor Flash process.
Low Power BandGap Reference with chopper on SMIC 40nm
The IP is a Band-gap reference generator circuit.
Low Power BandGap Reference on SMIC 65nm
The BGR IP is a BandGap reference circuit for low-power application which just consumes 3.2uA in operation which works well in 1.…
Low Power BandGap Reference on SMIC 40nm
The BGR IP is a BangGap Reference for low-power application.
SMIC 0.13um Power Management Kit,1.2v operating voltage
SMIC 0.13um Power Management Kit Library
The IP is a 3 channel 12-bit DAC based on SMIC 110nm process with maximum current +/- 100mA of one channel.
IP
2.5V 12Bit pipeline analog to digital converter
TheS65LLV25_ADC_13 IP is a 2.5V 12Bit pipeline analog to digital converter capable of running at up to 100MHz conversion rate wit…