GF L55LP 55nm Clock Generator PLL - 80MHz-400MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
- GlobalFoundries
- 55nm
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
GF L55LP 55nm Clock Generator PLL - 80MHz-400MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L55LP 55nm Clock Generator PLL - 160MHz-800MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L55LP 55nm Clock Generator PLL - 320MHz-1600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L55G 55nm Clock Generator PLL - 90MHz-450MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L55G 55nm Clock Generator PLL - 180MHz-900MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L55G 55nm Clock Generator PLL - 360MHz-1800MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L28SLP 28nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L28SLP 28nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L28SLP 28nm Clock Generator PLL - 440MHz-2200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L28HPP 28nm Clock Generator PLL - 175MHz-875MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L28HPP 28nm Clock Generator PLL - 350MHz-1750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
GF L28HPP 28nm Clock Generator PLL - 700MHz-3500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096.
Embedded Charge Pump IP, for 1.8V/3.3V Logic
eMemory also offer Charge Pump IP as a quick & easy solution for customers who adopt eMemory's NeoBit NVM IP.
Embedded Charge Pump IP, for 1.8V/3.3V Logic
eMemory also offer Charge Pump IP as a quick & easy solution for customers who adopt eMemory's NeoBit NVM IP.
Embedded Charge Pump IP, for 1.8V/3.3V Logic
eMemory also offer Charge Pump IP as a quick & easy solution for customers who adopt eMemory's NeoBit NVM IP.
Embedded Charge Pump IP, for 1.8V/6V/16V BCDlite
eMemory also offer Charge Pump IP as a quick & easy solution for customers who adopt eMemory's NeoBit NVM IP.
GF L013LP 130nm General Purpose PLL - 90MHz-450MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
GF L013N 130nm General Purpose PLL - 120MHz-600MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
GF L013LV 130nm General Purpose PLL - 150MHz-750MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.
GF L013HP 130nm General Purpose PLL - 210MHz-1050MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability.