Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm Logic process SP/ Low-K synchronous high density Single Port SRAM memory compiler.
- UMC
- 90nm
- SP
Embedded memory IP cores are fundamental components in modern SoC and ASIC designs, providing fast and efficient on-chip data storage for processors, accelerators, and peripherals.
These IP cores encompass a broad range of volatile and non-volatile memory technologies, including SRAM for high-speed data storage, ROM for fixed program and boot code storage, register files for processor and accelerator architectures, as well as EEPROM, eFuse/OTP, and MTP (Multiple-Time Programmable) memories for configuration data, security credentials, device calibration, and permanent system information.
This catalog allows you to compare embedded memory IP cores from leading vendors based on density, access time, power consumption, and process node compatibility.
Whether you are designing high-performance processors, AI accelerators, automotive systems, or IoT devices, you can find the right embedded memory IP for your design.
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm Logic process SP/ Low-K synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT & redundancy Single Port SRAM.
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55um LP Low-K process Singal-Port SRAM compiler with redundancy feature.
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55um LP Low-K process ULL Singal-Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash Single Port SRAM with row redundancy/HVT/Power Gating.
Single Port SRAM Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash Single Port SRAM compiler with Power Gating /HVT.
Single Port SRAM Compiler IP, UMC 40nm LP process
ULL Single Port SRAM with row redundancy, UMC 40nm LP process.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP/LVT Single Port SRAM compiler with Power Gating & row redundancy.
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP/LVT Single Port SRAM compiler with peripheral LVT and Power Gating.
Single Port SRAM Compiler IP, UMC 40nm LP process
ULL Single Port SRAM, UMC 40nm LP process.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process LVT synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process LVT synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process standard LVT synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP Logic process LVT synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP process synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 28nm HLP process
high density Single Port SRAM, UMC 28nm HLP process.
Single Port SRAM Compiler IP, UMC 0.25um SP process
UMC 0.25um Logic process synchronous high speed Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous high density Single Port SRAM memory compiler.