Two Port Register File Compiler IP, UMC 90nm SP process
UMC 90nm SP Logic Low-K process synchronous Two Port (1R1W) Register File SRAM memory compiler.
- UMC
- 90nm
- SP
Embedded memory IP cores are fundamental components in modern SoC and ASIC designs, providing fast and efficient on-chip data storage for processors, accelerators, and peripherals.
These IP cores encompass a broad range of volatile and non-volatile memory technologies, including SRAM for high-speed data storage, ROM for fixed program and boot code storage, register files for processor and accelerator architectures, as well as EEPROM, eFuse/OTP, and MTP (Multiple-Time Programmable) memories for configuration data, security credentials, device calibration, and permanent system information.
This catalog allows you to compare embedded memory IP cores from leading vendors based on density, access time, power consumption, and process node compatibility.
Whether you are designing high-performance processors, AI accelerators, automotive systems, or IoT devices, you can find the right embedded memory IP for your design.
Two Port Register File Compiler IP, UMC 90nm SP process
UMC 90nm SP Logic Low-K process synchronous Two Port (1R1W) Register File SRAM memory compiler.
Two Port Register File Compiler IP, UMC 55nm LP process
UMC 55nm LP/ Low-K process PG Two Port Register File compiler.
Two Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP Two Port Register File with Sleep/Retention/Nap mode feature.
Two Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP/LVT process, Two Port Register File with LVT.
Two Port Register File Compiler IP, UMC 40nm LP process
UMC 40nm LP/ Low-K process, Two Port Register File memory compiler.
Two Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP peripheral LVT Two Port Register File memory compiler.
Two Port Register File Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/ Low-K Two Port Register File compiler.
Two Port Register File Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous low density Low Power Two Port (1R1W) SRAM memory compiler.
Two Port Register File Compiler IP, UMC 0.25um process
UMC 0.25um Logic process synchronous Two Port Register File compiler.
Two Port Register File Compiler IP, UMC 0.18um G2 process
UMC 0.18um GII Logic process synchronous Two Port (1R1W) Register File SRAM memory compiler.
Two Port Register File Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous Two Port Register File SRAM memory compiler.
Two Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um Logic HS FSG Synchronous high density Low Power Two Port Register File SRAM memory compiler.
Two Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process Synchronous Two Port Register File SRAM memory compiler.
Two Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/LL fusion (FSG) process high density synchronous Two Port Register File SRAM memory compiler.
Two Port Register File Compiler IP, UMC 0.11um LL/FSG process
UMC 0.11um Logic(LL) FSG process synchronous Two Port Register File memory compiler.
Two Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS Logic process synchronous Two Port Register File SRAM memory compiler.
Two Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Enhancement) Logic process synchronous Two Port Register File memory compiler.
Two Port Register File Compiler IP, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash HS process, Two Port Register File.
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT Low-K Logic process high density Single Port 6T SRAM Memory Complier.
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT/ Low-K process synchronous ultra high speed SRAM compiler.