Vendor: Truechip Solutions Category: Displayport

DisplayPort 2.0 Verification IP

The DisplayPort version 2.0 Verification IP provides an effective & efficient way to verify the components interfacing with the D…

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Overview

The DisplayPort version 2.0 Verification IP provides an effective & efficient way to verify the components interfacing with the DisplayPort interface of an ASIC/FPGA or SoC. The Display port VIP is fully compliant with Standard DisplayPort Version 2.0 specifications from VESA This VIP is a light weight VIP with easy plug-and -play interface so that there is no hit on the design time and the simulation time.

Key features

  • Fully compliant to VESA DisplayPort standard 2.0 Specification
  • Supports High Bandwidth Digital Content Protection System Version 1.4, 2.2 and 2.3.
  • Supports Multi-Stream transport (MST)
  • Supports Link Training(LT) tunable PHY Repeaters (LTTPR)
  • Supports Reed-Solomon Forward Error Correction RS(254,250)
  • Supports all Link rates as per DP 2.0 (UHBR10, UHBR13.5, UHBR20)
  • Supports 128b/132b channel encoding
  • Supports Control Data Indicator Field insertion
  • Supports Precoding and its decoding
  • Supports PIPE v 5.2.1 (For Link and PHY interfacing)
  • Supports DisplayPort Source device and Sink device functionality
  • Supports Main Link, AUX link and Hot Plug functionality (lRQ etc.,)
  • Supports multi lane configuration (upto 4 lanes)
  • Supports clock data recovery(CDR)
  • Supports Link Training
  • Supports Nibble Interleaving (ECC)
  • Supports DSC v1.2a(Compressed Display Stream Transport Services)
  • Supports DisplayPort Configuration Data (DPCD) version 1.4
  • Support of legacy EDID is provided
  • Supports I2C over AUX Channel and Native AUX
  • Supports Main Stream Attributes and SDP
  • Supports Interlaced, Non-Interlaced video stream and 3D stereo
  • Supports all types of Audio and Video as per CTA(CEA)
  • Supports RGB, YCbCr444, YCbCr422, YCbCr420 and RAW color format
  • Supports all color depth ( 6,8,10,12,16 bpc)
  • Supports transmitter and receiver skew
  • Supports serial and parallel bit ordering
  • Support Control Symbols for framing
  • Supports dynamically configurable modes.
  • Strong Protocol Monitor with real time exhaustive programmable checks.
  • Supports Dynamic as well as Static Error Injection scenarios.
  • On the fly protocol checking using protocol check functions, static and dynamic assertions
  • Built in Coverage analysis.
  • Graphical analyzer to show transactions for easy debugging

Benefits

  • Available in native System Verilog (UVM/OVM/ VMM) and Verilog
  • Unique development methodology to ensure highest levels of quality
  • Availability of Compliance & Regression Test Suites
  • 24X5 customer support
  • Unique and customizable licensing models
  • Exhaustive set of assertions and coverage points with connectivity example for all the components
  • Consistency of interface, installation, operation and documentation across all our VIPs
  • Provide complete solution and easy integration in IP and SoC environment

What’s Included?

  • DisplayPort 2.0 BFM's for:
    • Source - Link Layer
    • Source - MAC Layer
    • Source - PHY Layer
    • Sink - Link Layer
    • Sink - MAC Layer
    • Sink - PHY Layer
    • Branching Devices
  • DisplayPort layered monitor & scoreboard
  • Test Environment & Test Suite :
    • Basic and Directed Protocol Tests
    • Random Tests
    • Error Scenario Tests
    • Assertions & Cover Point Tests
    • Compliance Test Suite
    • User Test Suite
  • Integration guide, user manual, and release notes
  • GUI analyzer to view simulation packet flow

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
DP 2.0/1.4
Vendor
Truechip Solutions

Provider

Truechip Solutions
HQ: USA
Truechip is a leading provider of Design and Verification solutions – which help you to accelerate your design, lowering the cost and the risks associated in the development of your ASIC, FPGA and SoC. Truechip is a privately held company, with a global footprint and with a strong and experienced leadership team. Truechip was established in 2008 with a Mission to:
  • To create world class Verification IP Solutions
  • To provide expert consultancy to ASIC & SoC Design companies
  • To design SOCs from Architecture to Working Silicon
Our Vision is to:
  • To be the leading provider of Semiconductor IP Solutions
  • To be a one-stop-shop for Design and Verification
Our Guiding Principles are:
  • Customer Success
  • Commitment to Quality
    • Quality of Products
    • Quality of Engineers
  • Best in class Customer Support
  • Ethics and Integrity
We at Truechip leverage the extensive domain knowledge and expertise from current associations to provide complete set of design and verification solutions to our customers.
Contact Truechip Solutions

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Audio Transport in DisplayPort VIP

DisplayPort uses Secondary Data Packets (SDPs), which are transported over the Main-Link that are not main video stream data. This allows it to carry audio and video simultaneously. The VIP supports audio transmission both in the original mode as defined in the specification as well as just as any other SDP being transmitted.

Frequently asked questions about DisplayPort IP cores

What is DisplayPort 2.0 Verification IP?

DisplayPort 2.0 Verification IP is a Displayport IP core from Truechip Solutions listed on Semi IP Hub.

How should engineers evaluate this Displayport?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Displayport IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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