Single Port Low Voltage SRAM Memory Compiler on N22ULL - Low Power Retention and Column Repair
Single Port SRAM Compiler with Low Power Retention Mode and Ultra Low Leakage Bit Cell Power Supply (V) 6T 0.9
Overview
Single Port SRAM Compiler with Low Power Retention Mode and Ultra Low Leakage
| Bit Cell | Power Supply (V) |
| 6T | 0.9 |
Key features
- Ultra-Low Leakage: High VT (HVT) are used to minimize leakage performance
- Bit Cell: Utilizes Low Leakage 6T bit cells to ensure high manufacturing yields
- Ultra Low Power Standby: Internally generated bias voltage for low leakage data retention
- Isolated Array and Periphery supplies: Periphery voltage can be shut off to further reduce standby power
- Data Write-Through: Pin controllable write through disables data out transitions during a write to reduce power. During ATPG data out is controllable to ensure for full coverage
- Error Correction: Single bit error correction and dual bit error detection (SECDED) is optionally included in the synthesizable wrapper.
- Column Repair: Has 4 repairable elements
Block Diagram
Files
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Specifications
Identity
Provider
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Frequently asked questions about SRAM IP cores
What is Single Port Low Voltage SRAM Memory Compiler on N22ULL - Low Power Retention and Column Repair?
Single Port Low Voltage SRAM Memory Compiler on N22ULL - Low Power Retention and Column Repair is a SRAM IP core from Nordic Semiconductor Seattle listed on Semi IP Hub.
How should engineers evaluate this SRAM?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this SRAM IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.