Vendor: SmartDV Technologies Category: Video Processing

H265 ENCODER IIP

H265 Encoder core is compliant with standard ISO/IEC 23008-2/ITU-T H.265 specification.

Contact Provider Request Datasheet

Overview

H265 Encoder core is compliant with standard ISO/IEC 23008-2/ITU-T H.265 specification. Through its compatibility, it provides a simple interface to a wide range of low-cost devices.H265 Encoder IIP is proven in FPGA environment. The host interface of the H265 can be simple interface or can be AHB, AHB-Lite, APB, AXI, AXI-Lite, Tilelink, OCP, VCI, Avalon, PLB, Wishbone or custom buses.

H265 ENCODER IIP is supported natively in Verilog and VHDL

Key features

  • Supports ISO/IEC 23008-/ITU-T H.265 specification.
  • Supports full H.265/HEVC Encoder functionality.
  • Supports profile level up to 6.2.
  • Supports resolution up to 3840x2160@60fps.
  • Supports adaptive deblocking and sample adaptive offset filters.
  • Supports CABAC entropy coding.
  • Supports all prediction methods,
    • Inter prediction
    • Intra prediction
  • Supports 32x32, 16x16, 8x8 and 4x4 integer DCT Transform
  • Supports Chroma 4:4:4, 4:2:2 and 4:2:0
  • Supports VBR and CBR.
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready
  • Simple interface allows easy connection to microprocessor/microcontroller devices
  • Supports 8bpp,10bpp and 12bpp color modes
  • Supports input pixels at 1/2/4/8 pixel per clock
  • Supports 8,10,16,20,32 bits output bit stream

Block Diagram

H265 Encoder IIP block diagram

Benefits

  • Single site license option is provided to companies designing in a single site.
  • Multi sites license option is provided to companies designing in multiple sites.
  • Single Design license allows implementation of the IP Core in a single FPGA bitstream and ASIC.
  • Unlimited Designs, license allows implementation of the IP Core in unlimited number of FPGA bitstreams and ASIC designs.

What’s Included?

  • The H265 Encoder interface is available in Source and netlist products.
  • The Source product is delivered in plain text verilog. If needed VHDL,SystemC code can also be provided.
  • Easy to use Verilog Test Environment with Verilog Testcases
  • Lint, CDC, Synthesis, Simulation Scripts with waiver files
  • IP-XACT RDL generated address map
  • Firmware code and Linux driver package
  • Documentation contains User's Guide and Release notes.

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
H265 Encoder IIP
Vendor
SmartDV Technologies

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

Learn more about Video Processing IP core

Picking the right MPSoC-based video architecture: Part 1

A look at the design of multiprocessor systems-on-chips (MPSoCs) for video applications and how to optimize them for computational power and real-time performance as well as flexibility. Part 1: Architectural approaches to video processing

Analysis: ARC's Configurable Video Subsystems

Adding to its growing portfolio of licensable silicon IP subsystems, ARC has announced five configurable video processing subsystems. The subsystems range from the smallest-size AV 402V to the highest-performance AV 417V, and support multi-standard video encoding and decoding at resolutions ranging from CIF to D1.

Frequently asked questions about Video Processing IP

What is H265 ENCODER IIP?

H265 ENCODER IIP is a Video Processing IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP