Combo P1619 / 802.1ae (MACSec) GCM-AES/LRW-AES Cores

Overview

LAN security standard IEEE 802.1ae (MACSec) uses AES cipher in the GCM mode, while the disk/tape encryption standard IEEE P1619 uses the LRW mode. Since AES-GCM and AES-LRW share some of their basic components, a combo GCM-AES/LRW-AES core is not much larger than a dedicated core for either of the modes.

The GLM1 core is tuned for mid-performance P1619 and 802.1ae applications at the data rates of 3-5 Gbps and higher. GLM2 is designed for higher throughput up to 10 Gbps. Both cores use identical external interface, contain the base AES core AES1 and are available for immediate licensing.

GLM3 core is similar to GLM2, but its interface supports variable message length in the GCM mode.

The design is fully synchronous and available in both source and netlist form.

Key Features

Small size: from 31,000 ASIC gates for GLM1 from 58,000 ASIC gates for GLM2
400 MHz frequency in 130 nm process GLM1 throughput is 12.8 bits per clock GLM2 throughput is 25.6 bits per clock
Easily parallelizable to achieve higher throughputs
Completely self-contained: does not require external memory. Includes encryption, decryption, key expansion and data interface
Support for Galois Counter Mode Encryption and authentication (GCM-AES) and Liskov, Rivest, and Wagner Mode (LRW-AES)
Automatic generation of key context from key data and frame header
Flow-through design
Test bench provided

Block Diagram

Applications

IEEE 802.1ae LAN switches, routers, NICs
IEEE P1619, P1619.1 Hard drive and tape encryption, SAN, NAS

Deliverables

HDL Source Licenses

Synthesizable Verilog RTL source code
Test bench (self-checking)
Vectors for test bench
Expected results
User Documentation

Netlist Licenses

Post-synthesis EDIF
Testbench (self-checking)
Vectors for test bench
Expected results
Place & Route script

Technical Specifications

Availability

Now

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