Vendor: Xilinx, Inc. Category: FIFO / CAM

AXI Streaming FIFO

The AXI Streaming FIFO allows memory mapped access to a AXI Streaming interface.

Contact Provider Request Datasheet

Overview

The AXI Streaming FIFO allows memory mapped access to a AXI Streaming interface. The core can be used to interface to the AXI Ethernet without the need to use DMA. The principal operation of this core allows the write or read of data packets to or from a device without any concern over the AXI Streaming interface. The AXI Streaming interface is transparent to the user.

Key features

  • 32-bit AXI Memory Map slave interface with point to point optimizations.
  • Independent internal 2 Kb TX and RX data FIFOs
  • Full duplex operation.
  • Provides interrupts for many error and status conditions.

Specifications

Identity

Part Number
AXI Streaming FIFO
Vendor
Xilinx, Inc.
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Xilinx, Inc.
HQ: USA
Contact Xilinx, Inc.

Learn more about FIFO / CAM IP core

Implementing Ultra Low Latency Data Center Services with Programmable Logic

Data centers require many low-level network services to implement high-level applications. Key-Value Store (KVS) is a critical service that associates values with keys and allows machines to share these associations over a network. Most existing KVS systems run in software and scale out by running parallel processes on multiple microprocessor cores to increase throughput.

Generating High Speed CSI2 Video by an FPGA

In this article, we show how fast video streams conforming to MIPI CSI2 rev2.0 over MIPI DPHY rev1.2 can be generated, using VLSI Plus’ SVTPlus-CSI2-F IP core, with simple off-FPGA analog front-end. The high bit rates can be achieved with a relatively slow FPGA clock frequency, trading off FPGA resources for simple timing closure.

Rigorous Framework for Hardware-Software Co-design of Embedded Systems

When implementing new embedded applications, industrial companies are facing new challenges: these applications are very complex to program (between 5 and 10 million lines of code are common) and require handling of several possibly heterogeneous models and languages. Integration choices are wide-ranging, from functions hard-coded in hardware IP to embedded software for multi-core clusters. Additionally integration must take into account at the same time several kinds of constraints: processing power, memories, power budget limitation, etc.

Frequently asked questions about FIFO / CAM IP cores

What is AXI Streaming FIFO?

AXI Streaming FIFO is a FIFO / CAM IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this FIFO / CAM?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this FIFO / CAM IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP