RC Oscillator IP, Output: 15MHz - 50MHz, UMC 0.25um process
External-R, frequency 15MHz~50MHz.
- UMC
- 250nm
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
RC Oscillator IP, Output: 15MHz - 50MHz, UMC 0.25um process
External-R, frequency 15MHz~50MHz.
Power on Reset IP, UMC 0.25um MS process
Vrr=1.6V Vfr=1.4V, core type, Power On Reset with tunable reset time by external capacitor, UMC 0.25um Logic/MMC process.
Power on Reset IP, UMC 0.25um process
Power on Reset with Vrr and Vfr., Power On Reset, UMC 0.25um Logic process.
Power on Reset IP, UMC 0.25um process
Power on Reset with Vrr and Vfr., Power On Reset, UMC 0.25um Logic process.
Power on Reset IP, UMC 0.25um process
Power on reset using 0.25um process, A-type IO, Urr=1.8V, Ufr=1.6V, UMC 0.25um Logic process.
Power on Reset IP, UMC 0.11um eFlash process
Power on reset(POR) block, UMC 0.11um e-flash process.
Power on Reset IP, Input: 3.3V, UMC 0.11um HS/AE process
Vrr=2.2V Vfr=2.0V, B type IO, input VCCK=1.2V VCC3IO=3.3V, 3.3V Power On Reset, UMC 0.11um HS/AE (AL Enhancement) Logic process.
Power on Reset IP, Input: 3.3V, UMC 0.11um eFlash process
Vrr=2.2V, Vfr=2.0V, A type IO, 3.3V Power On Reset, UMC 0.11um AL eFlash process.
Power on Reset IP, Input: 2.5V, UMC 0.25um MS process
Power on Reset circuit tolerant with 0.25um, 2.5V MMC and Logic process VCC=2.5V, B type IO, Power On Reset, UMC 0.25um Logic pro…
Power on Reset IP, Input: 2.5V, UMC 0.25um process
Vrr=1.8V Vfr=1.6V, VCC=2.5V, Ivcc=13.4uA, B type IO, Power On Reset, UMC 0.25um Logic process.
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, Core type, Power On Reset, UMC 0.18um GII Logic process.
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, D type IO, Power On Reset, UMC 0.18um GII Logic process.
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, C type IO, Power On Reset, UMC 0.18um GII Logic process.
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, B type IO, Power On Reset, UMC 0.18um GII Logic process.
Power on Reset IP, Input: 1.2V, Vrr=0.8V, Vfr=0.65V, UMC 55nm LP process
Vrr=0.8V, Vfr=0.65V, input VCC=1.2V, 1.2V Power On Reset, UMC 55nm 2T LP/RVT Low-K Logic process.
Power on Reset IP, Input: 1.2V, Vrr=Vfr=0.8V, UMC 55nm LP process
Vrr=Vfr=0.8V, input VCC=1.2V, 1.2V Power On Reset, UMC 55nm 2T LP/RVT Low-K Logic process.
Power on Reset IP, Input: 1.2V, UMC 0.13um LL/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=10.7uA, Core type, Power On Reset, UMC 0.13um LL Logic(FSG) process.
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=12.7uA, HS process with B-type IO., Power On Reset, UMC 0.13um HS/FSG Logic process.
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=12.7uA, HS process with A-type IO., Power On Reset, UMC 0.13um HS/FSG Logic process.
Power on Reset IP, Input: 1.1V, UMC 40nm LP process
Vrr=0.8V, Vfr=0.65V, input VCC=1.1V, 1.1V Power On Reset, UMC 40nm LP/RVT Low-K Logic process.