GF L65LP 65nm Spread Spectrum PLL - 320MHz-1600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
- GlobalFoundries
- 65nm
- LP
Analog and Mixed-Signal IP cores are essential building blocks in modern SoC and ASIC designs, enabling seamless interaction between analog signals and digital processing.
These IP cores are widely used for data conversion (ADC, DAC), clock generation (PLL, oscillators), power management, and sensors & monitors such PVT monitors.
This catalog allows you to compare analog and mixed-signal IP cores from leading vendors by performance, power consumption, process node compatibility, and application domain.
Whether you are designing for wireless communication, automotive systems, consumer electronics, or industrial IoT, you can find the most suitable IP solutions for your requirements.
GF L65LP 65nm Spread Spectrum PLL - 320MHz-1600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
GF L65G 65nm Spread Spectrum PLL - 90MHz-450MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
GF L65G 65nm Spread Spectrum PLL - 180MHz-900MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
GF L65G 65nm Spread Spectrum PLL - 360MHz-1800MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
GF L018CB 180nm Spread Spectrum PLL - 55MHz-275MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
GF L018CB 180nm Spread Spectrum PLL - 110MHz-550MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
GF L018CB 180nm Spread Spectrum PLL - 220MHz-1100MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreadin…
UMC L90SP 90nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L90SP 90nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L90SP 90nm Deskew PLL - 240MHz-1200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L90GOD 90nm Deskew PLL - 125MHz-625MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L90GOD 90nm Deskew PLL - 250MHz-1250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L90GOD 90nm Deskew PLL - 500MHz-2500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L90G 90nm Deskew PLL - 90MHz-450MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L90G 90nm Deskew PLL - 180MHz-900MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L90G 90nm Deskew PLL - 360MHz-1800MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L80GOD 80nm Deskew PLL - 150MHz-750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L80GOD 80nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L80GOD 80nm Deskew PLL - 600MHz-3000MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.
UMC L80G 80nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference.