Vendor: Sofics Category: GPIO

1.2V Thin Oxide GPIO on TSMC 28nm RF HPC+

The 1.2V Thin Gate GPIO is an IP macro for on-chip integration.

Overview

The 1.2V Thin Gate GPIO is an IP macro for on-chip integration. It is a 1.2V general purpose I/O that does not rely on thick-gate devices. Only thin-gate, 0.9V capable core MOS devices are used in the design.

Supported features include core isolation, programmable slew rate compensation, programmable drive strength, input/output enable, pull select and pull enable. Extra features such as programmable hysteresis can be supported upon request.

The 1.2V Thin Gate GPIO targets radiation hard applications or other applications prohibiting the use of thick gate I/O devices. By default, a 2kV HBM ESD protection is included. This is however easily scaled to any desired level. This specific IP macro is designed in TSMC 28nm RF HPC+, and can be ported to other technologies upon request using Sofics inhouse design tool flow.

Physical implementation 

  • TSMC 28nm RF HPC+ 1P9M 
  • No thick gate devices, MIM cap or STI required 
  • Pad size 70um x 70um

Key features

  • Overvoltage tolerant design 
  • Core domain isolation 
  • Compatible with TSMC I/O ring 
  • Vertical and horizontal orientation 
  • Temp range -40°C to 125°C TJ 
  • 100kΩ pullup/pulldown 
  • Integrated 2kV HBM ESD 
  • Programmable slope control 
  • 0.9V digital interface 
  • Bias generation circuit can be shared over multiple I/O instances

Block Diagram

Files

Note: some files may require an NDA depending on provider policy.

Silicon Options

Foundry Node Process Maturity
TSMC 28nm 28nm 280 nm

Specifications

Identity

Part Number
1.2V Capable GPIO on TSMC 28nm RF HPC+
Vendor
Sofics

Provider

Sofics
HQ: Belgium
Sofics: Solutions for ICs Sofics is a foundry independent semiconductor IP provider that has supported 130+ companies worldwide. We provide interfaces and I/Os that safeguard and enhance the core of your ICs with gold-standard solutions. Fabless companies using Sofics IP can enable higher performance, higher robustness and reduce design time and cost. Our technology has been characterized on 10+ foundries including advanced nodes at TSMC, UMC, GF, Samsung Foundry. Our customers have integrated Sofics IP into more than 5000 IC designs across many different application verticals. Sofics IP is used in 40% of recent Bluetooth products, billions of smartphone imager chips, over a billion FPGA chips, most of the indoor positioning applications, in several car models and keys, optical communication modules for datacenters from multiple vendors and many other applications....

Learn more about GPIO IP core

GPIO Solutions for CERN’s Radiation-Hardened Applications

For over a decade, Sofics has collaborated with CERN, the European Organization for Nuclear Research. Sofics has delivered advanced GPIO cells tailored for radiation-hardened applications, supporting CERN’s groundbreaking particle physics experiments.

A Generic Solution to GPIO verification

This paper provides a complete solution to the GPIO Verification for any SoC. GPIO interface is available in every ASIC. To avoid duplicate efforts and (save) time to verify the GPIO interface, we have produced this Generic GPIO verification suite. It is a UVM-based verification environment, with all the necessary subcomponents that are required to verify any GPIO design.

Integrating Post-Quantum Cryptography (PQC) on Arty-Z7

Post-quantum cryptography (PQC) is moving from theory to engineering reality. With NIST-standardized algorithms ML-KEM (FIPS 203) and ML-DSA (FIPS 204) now finalized, FPGA developers face a practical challenge: How to integrate these algorithms efficiently on resource-constrained hardware?

From I2C to I3C: Evolution of Two-Wire Communication in Embedded Systems

The I2C (Inter-Integrated Circuit) Bus invented in 1980 by Philips Semiconductors (NXP Semiconductors today) was a massive step forward in simplifying communications in embedded systems. It is a simple two-wire interface for synchronous, multi-master/multi-slave, single ended serial communication. Fast forward 45 years to today and it is still widely used for attaching low speed peripheral Integrated Circuits (ICs), processors and microcontrollers. But silicon today has changed...

One Platform, Five Libraries: Certus Semiconductor’s I/O IP Portfolio for Every Application on TSMC 22nm ULL/ULP Technologies

Certus Semiconductor’s I/O libraries for TSMC’s 22nm ultra-low leakage (22ULL) and 22nm ultra-low power (22ULP) technologies offer robust, high-performance solutions tailored to a wide range of SoC designs — from ultra-low power IoT nodes to demanding consumer and automotive systems. Whether you need low leakage, high drive strength, or analog compatibility, our production-proven IP covers it all.

Frequently asked questions about GPIO Pad Library IP cores

What is 1.2V Thin Oxide GPIO on TSMC 28nm RF HPC+?

1.2V Thin Oxide GPIO on TSMC 28nm RF HPC+ is a GPIO IP core from Sofics listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this GPIO?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GPIO IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP