Silistix Hires Interconnect Industry Veteran David Lautzenheiser as Marketing VP
Company Prepared to Take the Next Step in Providing Design Solutions for Solving SoC Communication Problems
SAN JOSE, CA -- April 16, 2007 -- Silistix, a provider of innovative software for the design of on-chip communication solutions, has hired David Lautzenheiser as the company's Vice President of Marketing. Lautzenheiser will direct the Company's worldwide marketing activities as it enhances and distributes its CHAINworks suite of tools for designing self-timed SoC interconnect fabrics.
"It is a pleasure to join a company such as Silistix with the vision and the technical acumen to address several of the major issues facing SoC designers today," said Lautzenheiser. "My prior experience with network-on-chip and interconnect technology is a natural fit with the strong Silistix team as we work to address the 'wave of change' that chip designers will ultimately have to embrace."
Prior to accepting the position of Vice President of Marketing at Silistix, David successfully launched new companies and products as Vice President of Marketing both at Sonics and at LightSpeed Semiconductor. David began his marketing career at Xilinx where he led the introduction of the first FPGAs. He received a BSEE degree from Washington University in St. Louis, Missouri.
"We are very excited to have Dave join the Silistix team," said David Fritz, Silistix CEO. "His broad knowledge of the interconnect space will help us to more aggressively attack our target markets."
About Silistix
Silistix is the leading vendor of EDA tools and IP for the design of low-power, high-performance interconnect using self-timed techniques. Silistix products are used to solve fundamental problems in global timing closure, clock distribution, global consumer market pressures and effective utilization of advanced semiconductor process capabilities for System-on-Chip (SoC) devices. The company is venture funded and has offices in Manchester, England, San Jose, California, and Tokyo, Japan. For more information on Silistix and its products visit www.silistix.com.
Related Semiconductor IP
- 1.8V/3.3V I/O library with ODIO and 5V HPD in TSMC 16nm
- 1.8V/3.3V I/O Library with ODIO and 5V HPD in TSMC 12nm
- 1.8V to 5V GPIO, 1.8V to 5V Analog in TSMC 180nm BCD
- 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
- Specialed 20V Analog I/O in TSMC 55nm
Related News
- Silistix Hires Katherman as VP of Sales
- Actel Hires Semicondutor Industry Veteran for Key Marketing Role
- Evatronix hires Carsten Elgert as VP of Marketing and Sales
- Embedded OTP Leader Sidense Hires NVM Veteran Humes for Product Engineering VP Position
Latest News
- Will RISC-V reduce auto MCU’s future risk?
- Frontgrade Gaisler Launches New GRAIN Line and Wins SNSA Contract to Commercialize First Energy-Efficient Neuromorphic AI for Space Applications
- Continuous-Variable Quantum Key Distribution (CV-QKD) system demonstration
- Latest intoPIX JPEG XS Codec Powers FOR-A’s FA-1616 for Efficient IP Production at NAB 2025
- VeriSilicon Launches ISP9000: The Next-Generation AI-Embedded ISP for Intelligent Vision Applications