PACT announced beta availability of its XPP Vectorizing C-Compiler (XPP-VC) technology
C way to reconfigurable ASICs
By David Larner, Embedded Systems
October 4, 2001 (10:51 a.m. EST)
URL: http://www.eetimes.com/story/OEG20011004S0034
PACT announced beta availability of its XPP Vectorizing C-Compiler (XPP-VC) technology. This is designed to allow developers to create "virtual reconfigurable ASICs" using existing C language source code as opposed to hardware programming in Verilog/VHDL or proprietary tools.
Related Semiconductor IP
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
- HiFi iQ DSP
- CXL 4 Verification IP
- JESD204E Controller IP
Related News
- Axys models new ARM core, Pact speeds up XPP
- PACT XPP Technologies teams with Accent to offer SOC Design Services and Application Platforms for XPP-Based Solutions
- QuickLogic and PACT team to develop Multi-Processor programmable SoC solutions for wireless and multimedia applications
- PACT announces the Smart Media XPP Package for Multi-Standard Video Codecs
Latest News
- Cadence Reports Fourth Quarter and Fiscal Year 2025 Financial Results
- Renesas Develops 3nm TCAM Technology Combining High Memory Density and Low Power, Suitable for Automotive SoCs
- RaiderChip showcases the evolution of its local Generative AI processor at ISE 2026
- ChipAgents Raises $74M to Scale an Agentic AI Platform to Accelerate Chip Design
- Avery Dennison announces first-to-market integration of Pragmatic Semiconductor’s chip on a mass scale