PACT announced beta availability of its XPP Vectorizing C-Compiler (XPP-VC) technology
C way to reconfigurable ASICs
By David Larner, Embedded Systems
October 4, 2001 (10:51 a.m. EST)
URL: http://www.eetimes.com/story/OEG20011004S0034
PACT announced beta availability of its XPP Vectorizing C-Compiler (XPP-VC) technology. This is designed to allow developers to create "virtual reconfigurable ASICs" using existing C language source code as opposed to hardware programming in Verilog/VHDL or proprietary tools.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Axys models new ARM core, Pact speeds up XPP
- PACT XPP Technologies teams with Accent to offer SOC Design Services and Application Platforms for XPP-Based Solutions
- QuickLogic and PACT team to develop Multi-Processor programmable SoC solutions for wireless and multimedia applications
- PACT announces the Smart Media XPP Package for Multi-Standard Video Codecs
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack