PACT announced beta availability of its XPP Vectorizing C-Compiler (XPP-VC) technology
C way to reconfigurable ASICs
By David Larner, Embedded Systems
October 4, 2001 (10:51 a.m. EST)
URL: http://www.eetimes.com/story/OEG20011004S0034
PACT announced beta availability of its XPP Vectorizing C-Compiler (XPP-VC) technology. This is designed to allow developers to create "virtual reconfigurable ASICs" using existing C language source code as opposed to hardware programming in Verilog/VHDL or proprietary tools.
Related Semiconductor IP
- xSPI Multiple Bus Memory Controller
- MIPI CSI-2 IP
- PCIe Gen 7 Verification IP
- WIFI 2.4G/5G Low Power Wakeup Radio IP
- Radar IP
Related News
- Axys models new ARM core, Pact speeds up XPP
- PACT XPP Technologies teams with Accent to offer SOC Design Services and Application Platforms for XPP-Based Solutions
- QuickLogic and PACT team to develop Multi-Processor programmable SoC solutions for wireless and multimedia applications
- PACT announces the Smart Media XPP Package for Multi-Standard Video Codecs
Latest News
- Premier ASIC and SoC Design Partner, Sondrel, Rebrands as Aion Silicon
- Intel Financial Risks, Layoffs, Foundry Ambitions
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
- China Takes the Lead in RF Front-End Patent Activity: RadRock and Others Surge Behind Murata
- Arteris Wins Two Gold and One Silver Stevie® Awards in the 2025 American Business Awards®