GF14nm DDR4/LPDDR PHY Controller IP Listing

LPDDR5X, LPDDR5, LPDDR4X, LPDDR4, LPDDR3 PHY and Controller The DDR/LPDDR PHY IP, a family of high-speed on-chip interface IP, pr…

• DDR
• Silicon proven

LPDDR5X, LPDDR5, LPDDR4X, LPDDR4, LPDDR3 PHY and Controller The DDR/LPDDR PHY IP, a family of high-speed on-chip interface IP, pr…

• TSMC
• 5nm
• N5
• Available on request

The DDR controller (DDR4/LPDDR4 Controller) supports the following SDRAM types: DDR4 LPDDR4 On the host side, DDR4/LPDDR4 Control…

• DDR

The DDR4&LPDDR4 COMBO IO is used to transfer the Command/Address/Clk and Data between the memory controller PHY and the DRAM devi…

• TSMC
• 22nm
• ULL

The UMMC Controller is a flexible and configurable design.

• DDR

The DDR PHY IP is a combination of hard macro, I/O Pad and synthesizable RTL to provide a physical interface to JEDEC standard DD…

• Single-Protocol PHY