Interface IP Listing

xSPI (Expanded Serial Peripheral Interface) is the serial synchronous communication protocol developed by JEDEC eXpanded Serial P…

• Verification IP

The SmartDV Verification IP (VIP) for SSI (Synchronous Serial Interface) is a full-duplex synchronous serial interface and can co…

• Verification IP

SPI (Serial Peripheral Interface) Flash is the serial synchronous communication protocol developed by SPI Block Guide V04.01.

• Verification IP

SPI (Serial Peripheral Interface) is the serial synchronous communication protocol developed by SPI Block Guide V04.01.

• Verification IP

SMPTE SDI Verification IP is fully compliant with SMPTE SDI Specification.

• Verification IP

QSPI (Quad Serial Peripheral Interface) VIP can be used to verify Master or Slave device following the QSPI basic protocol.It can…

• Verification IP

Open LVDS Display Interface(OpenLDI) specification was developed through the cooperation of companies in the semiconductor, displ…

• Verification IP

Octal SPI is the serial synchronous communication protocol developed by Macronix(CMOS MXSMIO®(SERIAL MULTI I/O) Flash memory).It …

• Verification IP

eSPI (Enhanced Serial Peripheral Interface) is the serial synchronous communication protocol.

• Verification IP

ONFI (Open Nand Flash Interface) provides an smart way to verify the ONFI host controller or ONFI Flash memory model of a SOC or …

• Protocol Bridge

Camera/HDMI Video Input Interface core capture the incoming clocked video of horizontal and vertical active picture data and remo…

• HDMI
• Not Applicable
• Available
• FPGA IP Core

The USXGMII PCS IP provides the logic required to integrate a USXGMII-M IP into any system on chip (SoC).

• Single-Protocol PHY

SGMII (Serial Gigabit Media Independent Interface) IP is a high-speed serial interface developed to connect a Gigabit Ethernet MA…

• Single-Protocol PHY

The MIPI C-PHY V1.2 improves throughput over a bandwidth-limited channel, allowing more data without an increased signaling clock.

• MIPI D-PHY

The MIPI CPHY V1.1 improves throughput over a bandwidth-limited channel, allowing more data without an increased signaling clock.

• MIPI C-PHY

CPI is Developed by experts who has worked on multiple Video and Camera protocols to support the Image sensor digital interface c…

• Verification IP

XSPI (Expanded Serial Peripheral Interface) Synthesizable Transactor provides a smart way to verify the XSPI component of a SOC o…

• SPI / QSPI XSPI

SPI (Serial Peripheral Interface) Synthesizable Transactor provides a smart way to verify the SPI component of a SOC or a ASIC in…

• SPI / QSPI XSPI

Open Nand Flash Interface (ONFI) Synthesizable Transactor provides a smart way to verify the ONFI component of a SOC or a ASIC in…

• Protocol Bridge

EMIF provides an smart way to verify the EMIF component of a SOC or a ASIC.

• Bus Fabric