High-Speed SerDes IP Listing

The 64G SerDes PHY is a configurable PHY capable of supporting speeds up to 64Gbps within a single lane.

• Multi-Protocol PHY

28Gb/s 4 lane high-speed SerDes; UMC 28nm HPC Logic Std/HS process

• UMC
• 28nm
• HPC

1-VIA’s ultra-high-speed and ultra-low-power PCIe Gen 3/4/5 SerDes technology is customizable to meet your requirements for a wid…

• Multi-Protocol PHY

The 10 Gigabit Ethernet Extended Sublayer (XGXS) Intellectual Property (IP) Core enables the creation of system solutions for 10 …

• Single-Protocol PHY

10Gb Ethernet Attachment Unit Interface or XAUI is a high-speed interconnect that offers reduced pin count and has the ability to…

• Single-Protocol PHY

AMBA AXI from ARM Holdings is an high performance on-chip bus architecture.

• Protocol Bridge
• In production
• Now

As real-time workloads—from high-frequency trading to low-latency AI and edge analytics—push system responsiveness to the limit, …

• TSMC
• 12nm
• FFC

As real-time workloads—from high-frequency trading to low-latency AI and edge analytics—push system responsiveness to the limit, …

• TSMC
• 22nm
• ULP

The relentless demand for higher data throughput in data centers and high-performance computing (HPC) systems drives the need for…

• TSMC
• 12nm
• FFC

The relentless demand for higher data throughput in data centers and high-performance computing (HPC) systems drives the need for…

• TSMC
• 22nm
• ULP

The 32G SerDes PHY is a configurable IP solution capable of supporting data rates of up to 32 Gbps per lane.

• Multi-Protocol PHY

The 56G Long-Reach (LR) SerDes PHY provides exceptional performance with best-in-class power and area, making it ideal for machin…

• TSMC
• 7nm
• N7+
• Silicon Proven

The Synopsys SuperSpeed USB IP solution is implemented in hundreds of designs and shipped in millions of units.

• USB
• Available on request
• Available

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• TSMC
• 4nm
• N4P

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• TSMC
• 4nm
• N4P

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• TSMC
• 4nm
• N4P

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• TSMC
• 4nm
• N4P

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• TSMC
• 7nm
• N7A

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• TSMC
• 6nm
• N6

Synopsys Low Voltage Differential Signaling (LVDS) IO library is a high-frequency interface that uses differential signals for da…

• TSMC
• 5nm
• N5A