So-Logic
•
HQ:
Austria
The so_ip_sata2_hctrl is a soft core implementation of SATA host controller as defined in the SATA specification 2.6.
- SATA Controller
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Compare 18 So-Logic IP Cores from 1 vendors
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So-Logic• HQ: Austria
The so_ip_sata3_hctrl is a soft core implementation of SATA host controller as defined in the SATA Specification 3.2.
- SATA Controller
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So-Logic• HQ: Austria
So_ip_idt core can be used create a decision tree directly in hardware.
- Edge AI Accelerator
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8051 Compatible Microcontroller Core
So-Logic• HQ: AustriaThe so_ip_8051M256 is a soft core of a single-chip 8-bit embedded microcontroller dedicated for operation with fast (on-chip) and…
- MCU
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So-Logic• HQ: Austria
The so_ip_8051C256 is a soft core of a 8-bit CPU dedicated for operation with fast (on-chip) and slow (off-chip) memories.
- CPU
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So-Logic• HQ: Austria
The so_ip_srio_ctrl is a soft core implementation of Serial RapidIO controller as defined in the RapidIO specification 2.2.
- RapidIO
- Fully compliant with the Ra…
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Behavioral knowledge space combination rule core with parallel operation
So-Logic• HQ: AustriaSo_ip_ecr_bks_p core can be used to implement the Behavior Knowledge Space (BKS) combination rule to calculate the ensemble class…
- Control Logic
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Behavioral knowledge space combination rule core with serial operation
So-Logic• HQ: AustriaSo_ip_ecr_bks_s core can be used to implement the Behavior Knowledge Space (BKS) combination rule to calculate the ensemble class…
- Control Logic
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Weighted majority voting combination rule core with parallel operation
So-Logic• HQ: AustriaSo_ip_ecr_mvt_p core can be used to implement the Weighted Majority Voting combination rule to calculate the ensemble classificat…
- Control Logic
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Majority voting combination rule core with parallel operation
So-Logic• HQ: AustriaSo_ip_ecr_mv_p core can be used to implement several Majority Voting combination rules to calculate the ensemble classification o…
- Control Logic
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Majority voting combination rule core with serial operation
So-Logic• HQ: AustriaSo_ip_ecr_mv_s core can be used to implement the several variants of the Majority Voting combination rule to calculate the ensemb…
- Control Logic
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So-Logic• HQ: Austria
So_ip_edte_un_p core can be used to implement the ensemble member evaluation module as a part of an ensemble classifier consistin…
- Edge AI Accelerator
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Area-efficient decision tree ensemble evaluation core based on serial evaluation of ensemble members
So-Logic• HQ: AustriaSo_ip_edte_un_s core can be used to implement the ensemble member evaluation module as a part of an ensemble classifier consistin…
- Edge AI Accelerator
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Decision tree ensemble evaluation core based on parallel evaluation of ensemble members
So-Logic• HQ: AustriaSo_ip_edte_smpl_p core can be used to implement the ensemble member evaluation module as a part of an ensemble classifier consist…
- Edge AI Accelerator
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Decision tree ensemble evaluation core based on serial evaluation of ensemble members
So-Logic• HQ: AustriaSo_ip_edte_smpl_s core can be used to implement the ensemble member evaluation module as a part of an ensemble classifier consist…
- Edge AI Accelerator
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Decision tree ensemble classifier inference core
So-Logic• HQ: AustriaSo_ip_idte core can be used create an ensemble of decision trees directly in hardware.
- Edge AI Accelerator
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Decision tree evaluation core using serial architecture
So-Logic• HQ: AustriaSo_ip_edt_un core can be used to implement the decision tree with the previously defined structure directly in hardware.
- Edge AI Accelerator
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Decision tree evaluation core using pipelined architecture
So-Logic• HQ: AustriaSo_ip_edt_smpl core can be used to implement the decision tree with the previously defined structure directly in hardware.
- Edge AI Accelerator