Vendor: Fraunhofer Institute Integrated Circuits and Systems (IIS) Category: RF Front End

Ultra-low power RF receiver / WakeUp receiver

RFicient®Basic, Ultra-Low-Power WakeUp Receiver – this IC solution will allow customers to optimize the power consumption for i.e.

Contact Provider Request Datasheet

Overview

RFicient®Basic, Ultra-Low-Power WakeUp Receiver – this IC solution will allow customers to optimize the power consumption for i.e. IoT applications. Thereby battery lifetime could be increased dramatically. The integrated receiver continuously monitors a radio channel while boasting a very low current consumption of 2.5 μA with a response time of only 32 ms.

RFicient®Basic provides single or simultaneous multiband operation in the frequency bands 433 MHz, 868/915 MHz and 2.4 GHz for global and reliable wireless connection. The integrated ULP receiver was developed in standard CMOS technology and achieves a receiver sensitivity of -80 dBm.

The receiver operates without the use of a microcontroller and recognizes two separate wake-up patterns. After receiving a specific wake-up pattern, a digital control signal is generated to activate any application hardware like a MCU.

The possibility of selective addressing allows single nodes, entire sensor networks or dedicated groups to be addressed individually. The receiver has an on-chip LDO and can therefore be operated directly on a single 3V power supply. An integrated 32 kHz real time clock crystal oscillator allows independent operation and provides long-term timers up to 1 year as well as 16 bit cyclic timers up to 2 seconds. This allows the microcontroller to be operated in deep sleep mode to save power.

Key features

  • Supply current: < 3 μA (1 kbit/s)
  • Response time: < 32 ms (1 kbit/s)
  • Sensitivity: -80 dBm
  • Frequency bands:  433 MHz, 868/915 MHz, 2.4 GHz
  • Permanent accessibility
  • Operation with microcontroller in deep sleep
  • Detection of two independent wake-up events
  • FEC coded data reception
  • Selective wake-up with 16 Bit ID
  • 32 kHz real time clock crystal oscillator
    • Timer up to 1 year
    • 16 bit cyclic timer up to 2 seconds
  • Single Supply Voltage: 1.8 V – 3.3 V
  • Silicon evaluated in 130 nm CMOS

Block Diagram

RF_WakeUp_Rx block diagram

Benefits

  • Low design risk due to silicon proven design
  • Customer specific flexible design

Applications

  • Home
  • Logistics
  • Automotive
  • Industry
  • Retail

What’s Included?

  • GDSII data
  • Documentation
  • Silicon validation report
  • Integration and customizing support

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
RF_WakeUp_Rx
Vendor
Fraunhofer Institute Integrated Circuits and Systems (IIS)
Type
Silicon IP

Provider

Fraunhofer Institute Integrated Circuits and Systems (IIS)
HQ: Germany
The Fraunhofer Institute for Integrated Circuits (IIS) offers core components for ASIC and FPGA solutions. The cores are developed by Fraunhofer IIS in Erlangen, Germany and selected partners. Over 25 years of system and design know-how, analog and digital design experience, and the needs of our customers have influenced the methodology to develop these cores. Each core has been verified with sophisticated test procedures at Fraunhofer IIS before it is offered to the customers. As a result, the cores are of high quality and proven technology. Many components are parameterizable and allow the designer to tailor each component to the needs of the application. Therefore, using our components saves lots of design and verification effort.
Contact Fraunhofer Institute Integrated Circuits and Systems (IIS)

Learn more about RF Front End IP core

Is there a "one-size fits all" SOC PLL?

Like most types of circuits, there is no such thing as a "one size fits all" PLL. This article will explore the trade-offs in PLL performance and design and look for a solution to most SOC PLL needs.

Frequently asked questions about RF Front End IP cores

What is Ultra-low power RF receiver / WakeUp receiver?

Ultra-low power RF receiver / WakeUp receiver is a RF Front End IP core from Fraunhofer Institute Integrated Circuits and Systems (IIS) listed on Semi IP Hub.

How should engineers evaluate this RF Front End?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this RF Front End IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP