Quadrature former 25-1750MHz
The quadrature former block is intended to generate quadrature signal in frequency range 25-1750MHz with phase correction ±4?.The…
Overview
The quadrature former block is intended to generate quadrature signal in frequency range 25-1750MHz with phase correction ±4?.The quadrature former core is based on frequency division by 4, implemented on CMOS logic. The block input frequency range 100-7000MHz. The phase correction block uses the dependence of the fronts rise rate of the supply voltage, that in turn affects the phase of the output quadrature signal. The buffers located at the output of the quadrature former, in addition to the output power amplifying, also serve as a junction between the core (frequency divider) and the external blocks.
Key features
- TSMC CMOS 55 nm
- Output frequency range 25-1750 MHz
- QF division ratio 4
Block Diagram
Applications
- Quadrature signal processing for mixer
What’s Included?
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Files
Note: some files may require an NDA depending on provider policy.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| TSMC | 55nm | GP | Silicon Proven |
Specifications
Identity
Provider
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Frequently asked questions about RF Front End IP cores
What is Quadrature former 25-1750MHz?
Quadrature former 25-1750MHz is a RF Front End IP core from NTLab listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.
How should engineers evaluate this RF Front End?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this RF Front End IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.