Simulation VIP for I2S
The Cadence® Verification IP (VIP) for I2S library is a ready-made, configurable VIP for the I2S protocol.
Overview
The Cadence® Verification IP (VIP) for I2S library is a ready-made, highly configurable VIP for the I2S protocol. It allows tests to be run in a pure simulation environment. It provides a highly capable compliance verification solution that supports simulation, formal analysis, and hardware acceleration platforms, making it applicable to intellectual property (IP), system-on-chip (SoC), and system-level verification. The VIP for I2S is compatible with the industry-standard Universal Verification Methodology (UVM) and runs on all leading simulators.
Supported Specification: I2S Specification - Philips Semiconductors.
Key features
- Configurability
- Fully configurable VIP configuration: Manager/Subordinate, Transmitter/Receiver, Active/Passive
- Word Length Programmability
- Supports 8, 12, 16, 20, 24, 32, and user-defined
- Default Transactions
- Configurable default transactions
- Functionality
- Full I2S Transmitter and Receiver functionality, DSP Mode, Left Justified, Right Justified, and MultiChannel
- Time Division Multiplexing (TDM)
- Supports 2, 4, 8 Channel Multiplexing with Programmable Word Length
- Full Duplex Mode
- Supports TDM, DSP mode, Left Justified, and Right Justified
Block Diagram
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about I2S IP cores
What is Simulation VIP for I2S?
Simulation VIP for I2S is a I2S IP core from Cadence Design Systems, Inc. listed on Semi IP Hub.
How should engineers evaluate this I2S?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2S IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.