Vendor: SmartDV Technologies Category: I2S

I2S Synthesizable Transactor

I2S Synthesizable Transactor provides a smart way to verify the I2S bi-directional two-wire bus component of a SOC or a ASIC in E…

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Overview

I2S Synthesizable Transactor provides a smart way to verify the I2S bi-directional two-wire bus component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's I2S Synthesizable Transactor is fully compliant with Philip's I2S-Bus Specification June 5, 1996 and provides the following features.

Key features

  • Supports Philips I2S Bus Specification June 5, 1996
  • Full I2S Transmitter, Receiver and Controller functionality
  • Supports up to 32 channels in transmit path
  • Supports up to 32 channels in receive path
  • Supports programmable word length 8,12,16,20,24,32
  • Supports programmable padding
  • Supports programmable bit reversal
  • Supports left and right justified
  • Both transmitter and receiver can either work with SCK as input or can drive SCK
  • Supports programmable data rate on transmit path
  • Can operate as master or slave in several configurations
    • Master or slave mode as transmitter
    • Master or slave mode as receiver
    • Master mode as controller (does not transmit or receive data)
  • I2S SimXL comes with complete test suite to test every feature of I2S specification
  • Ability to detect and insert various types of error
  • The model has a rich set of configuration parameters to control I2S functionality
  • Supports fully synthesizable
  • Supports static synchronous design
  • Supports positive edge clocking and no internal tri-states
  • Supports simple interface allows easy connection to microprocessor/microcontroller devices

Block Diagram

I2S Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the I2S testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation contains User's Guide and Release notes

Specifications

Identity

Part Number
I2S Transactor
Vendor
SmartDV Technologies
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
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Frequently asked questions about I2S IP cores

What is I2S Synthesizable Transactor?

I2S Synthesizable Transactor is a I2S IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this I2S?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2S IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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