MIPS CPU IP Listing

The system controller core connects the system CPU to system memory, PCI bus, IO ports and external communication links.

• System Controller
• now

INT 1011 is flexible that is customizable for layer-3, layer-4, layer-5 network infrastructure and network security systems appli…

• Ethernet
• Yes
• Now

The Ceva-Waves Bluetooth platform comprises a comprehensive set of hardware IP, software modules, and radios from Ceva and third-…

• Bluetooth
• Silicon proven
• Available
• Bluetooth low energy versio…

As an industry- full camera ISP IP, the Image Signal Processor (ISP) features sophisticated pixel processing for wearable device,…

• ISP Image Signal Processor
• Silicon Integration
• Now

The MIPS I8500™ Multi-Processing System (MPS) builds on a long history of high performance multi-threaded and multiprocessor IP p…

• DMA

CompactFlash/PCMCIA Host Controller with EXCA Registers

• NOR Controller
• now

The EP550 is a host controller for SD memory card, SDIO and MMC interface.

• SD / eMMC Controller
• now

The Synopsys USB 2.0 Controllers support Hi-Speed (480 Mbps), Full Speed (12 Mbps), and Low Speed (1.5 Mbps) operation based on U…

• USB
• Available on request
• Available

The Synopsys USB 1.1 Controllers support Full and Low Speed based on USB specification from the USB Implementer Forum.

• USB
• Available on request
• Available

The MIPS® P8700 Multiprocessing System is the first RV64GCZba_Zbb compliant CPU IP focused on high performance, data movement and…

• CPU

Up to 1,500 MIPS @ 200 Mhz clock frequency for high data processing speed and precise process control The Generic Timer IP module…

• Timers & Watchdogs

The DB-I2C-S-SCL-CLK-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high-performance microprocessor via th…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• Philips I2C Specification 2…

The DB-I2C-S-AHB Controller IP Core interfaces a NIOS II, ARM, MIPS, PowerPC, ARC or other high-performance microprocessor via th…

• I2C / I3C

The DB-I3C-M-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI I3C – I…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• MIPI Alliance – Specificati…

The DB-I2C-S-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high-performance microprocessor via the AMBA 2…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• Philips I2C Specification 2…

The DB-I2C-S-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• NXP Rev 7.0 October 1, 2021

The DB-I2C-S-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high-performance microprocessor via the AMBA 4…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• Philips I2C Specification 2…

The DB-I2C-M-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• AMBA 2.0; Philips I2C Speci…

The DB-I2C-M-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• AMBA 2.0; Philips I2C Speci…

The DB-I2C-M-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• AMBA 2.0; Philips I2C Speci…