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Eric Esteve
Vendor:
Logic Design Solutions
Category:
NVMe Controller
Polarfire SoC NVMe Host
The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
Overview
The LDS NVME HOST RECORDER IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD.
The register file interface simplify the management of the IP for CPU interface or for State Machine interface using APB bus
When using a PCIe RP IP configured in Gen2 the PCIe frequency is at 125MHz.
When using a PCIe RP IP configured in Gen3 the PCIe frequency is at 250MHz.
The source code format is available for ease of customization. The customization can be done by Logic Design Solutions and DO254 documentation is available on request.
This IP can be customized according to specific needs (application-specific requirement). Any other pre-designed functions can be integrated into the FPGA. FPGA density and I/O requirements can be defined according to customer specification.
The register file interface simplify the management of the IP for CPU interface or for State Machine interface using APB bus
When using a PCIe RP IP configured in Gen2 the PCIe frequency is at 125MHz.
When using a PCIe RP IP configured in Gen3 the PCIe frequency is at 250MHz.
The source code format is available for ease of customization. The customization can be done by Logic Design Solutions and DO254 documentation is available on request.
This IP can be customized according to specific needs (application-specific requirement). Any other pre-designed functions can be integrated into the FPGA. FPGA density and I/O requirements can be defined according to customer specification.
Key features
- PCIe RP and EP register configuration is done automatically.
- NVMe register configuration is done automatically.
- Able to manage 8 Name Spaces.
- Able to manage until 16 IO Queue to fit specific user requirement.
- Each IO Queue is independent.
- Able to manage 512Bytes or 4096Bytes sector size.
- Able to run nearly all Admin command in parallel of IO Queue.
- Many IO command already pre-defined to ease use of the IP.
- Configurable IO Queue buffer size to fit user memory requirement in case of small density FPGA: 32KB, 64KB, 128KB or 256KB.
- Able to read all PCIe RP and EP registers.
- Easy connection to embedded Root Port PCIe IP through AXI bus.
Block Diagram
NVME-HOST-RECORDER-PFSOC block diagram
Applications
- Targeting embedded recorder systems.
What’s Included?
- Source code or Source Encrypted.
Specifications
Identity
Part Number
NVME-HOST-RECORDER-PFSOC
Vendor
Logic Design Solutions
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
Logic Design Solutions
HQ:
FRANCE
Logic Design Solutions is an FPGA Design and Intellectual Property (IP) company that provides Design Services, IP (cores) and DO254 methodology to FPGA customers.
We engage ourself to be your high standard quality solutions provider for FPGA cores and Design Services.
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Frequently asked questions about NVMe Controller IP cores
What is Polarfire SoC NVMe Host?
Polarfire SoC NVMe Host is a NVMe Controller IP core from Logic Design Solutions listed on Semi IP Hub.
How should engineers evaluate this NVMe Controller?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this NVMe Controller IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.