Vendor: VeriSilicon Microelectronics (Shanghai) Co., Ltd. Category: Single-Protocol PHY

LVDS transmitter PHY

The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolut…

Overview

The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link transmission between Host and Flat Panel Display with up to UXGA resolution.
 

The IP converts 35-bit of CMOS/TTL data into LVDS data stream. The transmitter can be programmed for rising edge or falling edge clocks via a dedicated pin.

 

Key features

  • Silicon Proven in 22,28,55,65,130n,180n from SMIC, Global Foundries and Samsung
  • Compatible with the National DS90CF386
  • Compatible with the TIA/EIA-644 standards
  • Converts 35 bits data to 5-pair LVDS data stream
  • Supports up to 1.05Gbps data rate for UXGA                
  • Clock edge selectable
  • Wide dot clock range: 25 ~ 150MHz suited for VGA, SVGA, XGA, SXGA, SXGA+ and UXGA
  • Output range is changeable from 50mV to 400mV
  • Core area: 0.5430mm^2
  • Power consumption:
    •   175.4mW@1.05Gbps, prbs7 pattern

Block Diagram

Files

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
LVDS TX PHY
Vendor
VeriSilicon Microelectronics (Shanghai) Co., Ltd.

Provider

VeriSilicon Microelectronics (Shanghai) Co., Ltd.
HQ: USA
VeriSilicon Microelectronics (Shanghai) Co., Ltd. (VeriSilicon, 688521.SH) is committed to providing customers with platform-based, all-round, one-stop custom silicon services and semiconductor IP licensing services leveraging its in-house semiconductor IP. Under the unique "Silicon Platform as a Service" (SiPaaS) business model, depending on the comprehensive IP portfolio, VeriSilicon can create silicon products from definition to test and package in a short period of time, and provides high performance and cost-efficient semiconductor alternative products for fabless, IDM, system vendors (OEM/ODM), large internet companies and cloud service provider, etc. VeriSilicon's business covers consumer electronics, automotive electronics, computer and peripheral, industry, data processing, Internet of Things (IoT) and other applications. VeriSilicon presents a variety of customized silicon solutions, including high-definition video, high-definition audio and voice, in-vehicle infotainment, video surveillance, IoT connectivity, smart wearable, high-end application processor, video transcoding acceleration and intelligent pixel processing, etc. In addition, VeriSilicon has six types of in-house processor IPs, namely GPU IP, NPU IP, VPU IP, DSP IP, ISP IP and Display Processor IP, as well as more than 1,400 analog and mixed signal IPs and RF IPs. Founded in 2001 and headquartered in Shanghai, China, VeriSilicon has 7 design and R&D centers in China and the United States, as well as 11 sales and customer service offices worldwide. VeriSilicon currently has more than 1,200 employees.

Learn more about Single-Protocol PHY IP core

UFS Goes Mainstream

UniversalFlash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniPro as well as eMMC form factors to simplify adoption and development.

Design IP Faster: Introducing the C~ High-Level Language

In this paper, we introduce a new high-level, dataflow programming language called C~ (“C flow”) that further increases productivity by raising the level of abstraction from behavioral descriptions, while overcoming the limitations of C for hardware design. We present the syntax and semantics of this language, and the framework that provides hardware and software code generation. This paper illustrates the benefits of using C~ for hardware design of a IEEE 802.3 MAC, synthesized for FPGA and for 90nm CMOS technology.

Universal Flash Storage: Mobilize Your Data

Universal Flash Storage (UFS) was created for mobile applications and computer systems requiring high performance and low power consumption. These systems typically use embedded Flash based on the JEDEC standard eMMC. UFS was defined by JEDEC as the evolutionary replacement for eMMC offering significantly higher memory bandwidth. The standard builds on existing standards such as the SCSI command set, the MIPI Alliance M-PHY and UniProSM as well as eMMC form factors to simplify adoption and development.

Can MIPI and MDDI Co-Exist?

Since MIPI and MDDI standards both target interfaces to cameras and displays on mobile devices, are two separate standards really needed?

Frequently asked questions about Single-Protocol PHY IP

What is LVDS transmitter PHY?

LVDS transmitter PHY is a Single-Protocol PHY IP core from VeriSilicon Microelectronics (Shanghai) Co., Ltd. listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP