Vendor: SmartDV Technologies Category: GDDR

GDDR6 DFI Synthesizable Transactor

GDDR6 DFI Synthesizable Transactor provides a smart way to verify the GDDR6 DFI component of a SOC or a ASIC in Emulator or FPGA …

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Overview

GDDR6 DFI Synthesizable Transactor provides a smart way to verify the GDDR6 DFI component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's GDDR6 DFI Synthesizable Transactor is fully compliant with standard DFI version 4.0 or 5.0 Specifications and provides the following features.

Key features

  • Compliant with DFI version 4.0 or 5.0 Specifications.
  • Supports GDDR6 devices compliant with JEDEC GDDR6 SGRAM Standard JESD250A and JESD250B.
  • Supports GDDR6 x16 or x8 clamshell modes.
  • Can be configured as a single controller driving two x16 GDDR6 channels simultaneously (x32 total) or two controllers each driving one x16 GDDR6 channel.
  • Supports GDDR6 operation at up to 18Gbps.
  • Supports GDDR6 error detection code (EDC).
  • Supports controller retries read and write transactions after EDC error detected.
  • Supports GDDR6 data bus inversion (DBI) and CA bus inversion (CABI).
  • Supports Per-bank and All-bank refresh.
  • Supports Write Single Mask (WSM) and Write Double Mask (WDM).
  • Supports GDDR6 low power modes (self-refresh and power-down).
  • Support for GDDR6 device densities from 8 to 32Gb.
  • Supports automatic generation and user-controlled initialization sequences.
  • Supports read and write commands with or without auto-precharge.
  • Supports DRAM Clock disabling feature.
  • Supports Low power control features.
  • Supports Error signaling.
  • Supports CA Training.
  • Supports WCK-DQ Training.
  • Supports WCK2CK Leveling.
  • Supports RDQS Toggle mode.
  • Supports all types of timing and protocol violations detection for timing parameters.
  • Protocol checker fully compliant with DFI version 4.0 or 5.0 Specifications.

Block Diagram

GDDR6 DFI Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesizable transactors
  • Complete regression suite containing all the GDDR6 DFI testcases
  • Examples showing how to connect various components, and usage of Synthesizable Transactor
  • Detailed documentation of all DPI, class, task and function's used in verification env
  • Documentation contains User's Guide and Release notes

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
GDDR6 DFI Transactor
Vendor
SmartDV Technologies

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
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Frequently asked questions about GDDR IP

What is GDDR6 DFI Synthesizable Transactor?

GDDR6 DFI Synthesizable Transactor is a GDDR IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this GDDR?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this GDDR IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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