Vendor: InPsy Category: Single-Protocol PHY

DDR and LPDDR Combo PHY

Our DDR and LPDDR Combo PHY is a versatile and high-performance solution designed to meet the memory interface needs of modern co…

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Overview

Our DDR and LPDDR Combo PHY is a versatile and high-performance solution designed to meet the memory interface needs of modern computing systems. This multi-standard PHY supports different types of DDR and LPDDR, providing flexibility and future-proofing for various applications including high-performance computing, mobile devices, and data centers. It ensures robust performance with high data rates, low latency, and efficient power consumption.

Key features

  • Supports multiple combinations of DDR/LPDDR interfaces
    • DDR3, DDR3L, DDR4 and LPDDR4 combo PHY
    • LPDDR4X and LPDDR5 combo PHY
    • LPDDR5 and LPDDR5X combo PHY
    • DDR4, DDR5 and LPDDR4 combo PHY
    • DDR4, DDR5, LPDDR4, LPDDR4X combo PHY
    • Etc.
  • Compliant with JEDEC DDR and LPDDR standards
  • Supports all auto calibrations
    • Impedance calibration
    • Delay measurement for clock period
    • Write-leveling and gate training (per DRAM specification)
    • Read and Write data eye training
    • Per-bit, per-rank delay controllable (including CA/DQ/DQS)
    • Etc.
  • Industry leading area and power
  • Robust Signal Integrity: Advanced equalization and timing features to ensure reliable data transmission
  • Supports DDR/LPDDR I/O with power-down retention
  • Supports CA and DQ signal swap table for easy system integration
  • Supports LPDDR Dynamic Voltage and Frequency Scaling (DVFS)
  • Compliant with AMBA APB3.0 for register accessing

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
DDR and LPDDR Combo PHY
Vendor
InPsy

Provider

InPsy
HQ: Taiwan (R.O.C.)
InPsy was founded in September 2019 with a vision to empower customer innovation with cutting-edge semiconductor interconnect IP solutions. Through seamless collaboration with major global wafer foundries, chip design houses and strategic partners, InPsy has demonstrated its mass production proven track record of IP technology firsts on the most advanced technology nodes. Ultimately, our mission is to be the leading provider of innovative silicon IP solutions, recognized globally for our unmatched customer satisfaction, exceptional quality, and technical excellence. Think of us as your outsourced, in-house IP design team
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Frequently asked questions about Single-Protocol PHY IP

What is DDR and LPDDR Combo PHY?

DDR and LPDDR Combo PHY is a Single-Protocol PHY IP core from InPsy listed on Semi IP Hub.

How should engineers evaluate this Single-Protocol PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Single-Protocol PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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