GLOBALFOUNDRIES 22nm FDX MIPI DPHY Master V1.2

Overview

This is a DPHY IP compliant to the “MIPI Alliance Spec for D-PHY v1.2”, which consists of 1-Clock and 4-Data lanes. It can support Master side. Each lane supports 2.5Gbps in High-Speed mode and 10Mbps/lane in Low-Power escape mode. The target applications are CSI-2 and DSI physical layers.

Key Features

  • Process: GLOBALFOUNDARIES 22nm FDSOI 0.8V/1.8V
  • 80 to 2500 Mbps data rate per lane in DPHY HS mode
  • All lanes support DPHY HS and ULPS modes in the forward direction
  • All data lanes support Escape mode(LPDT, Trigger) in the forward direction
  • D0 lane supports reverse Escape mode (LPDT, Trigger) and Turn-around
  • Lane number: 1 clock + 4 data
  • On-chip differential 100? terminations with calibration

Technical Specifications

Foundry, Node
GlobalFoundries, 22nm
Maturity
In Production
GLOBALFOUNDRIES
In Production: 22nm FDX
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Semiconductor IP