AMBA AXI3 Verification IP
The AMBA AXI3 Verification IP provides an effective & efficient way to verify the components interfacing with AMBA® AXI3 bus of a…
Overview
The AMBA AXI3 Verification IP provides an effective & efficient way to verify the components interfacing with AMBA® AXI3 bus of an IP or SoC. The AMBA AXI3 VIP is fully compliant with standard AMBA® AXI3 specification from ARM. This VIP is a light weight VIP with easy plug-and-play interface so that there is no hit on the design cycle time.
Key features
- Compliant to AMBA® AXI3 specifications from ARM.
- Support for all type of AMBA AXI3 devices.
- Parametrized data and address bus.
- Support for all protocol Burst Types, Burst Lengths and Response Types.
- Supports out of order transactions with parametrized out of order width.
- Strong protocol checking Bus Monitor which also provides statistics of the transactions.
- Configurable modes for Valid and Ready on different channels.
- Supports data interleaving on both read and write channel.
- Supports unaligned data transfers.
- Supports Privilege and Secure accesses and Configurable Memory.
- Support exclusive and locked transfers.
- Supports endianness check and conversion.
- Dynamic configuration is supported.
- Supports transaction logging with detailed description of each transfer.
- Supporst UVM_RAL Model.
- Provides detailed performance monitoring for all the transfers.
- Supports advanced System Verilog features like constrained random testing.
- Supports dynamically configurable modes.
- Strong Protocol Monitor with real time exhaustive programmable checks.
- Supports Dynamic as well as Static Error Injection scenarios.
- On the fly protocol checking using protocol check functions, static and dynamic assertion.
- Built in Extensive Coverage Across the Channels.
- Provides a comprehensive user API (callbacks) in all BFMs.
- Graphical analyser to show transactions for easy debugging.
Block Diagram
Benefits
- Available in native SystemVerilog (UVM/OVM/VMM) and Verilog
- Unique development methodology to ensure highest levels of quality
- Availability of various Regression Test Suites
- 24X5 customer support
- Unique and customizable licensing models
- Exhaustive set of assertions and cover points with connectivity example for all the components
- Consistency of interface, installation, operation and documentation across all our VIPs
- Provide complete solution and easy integration in IP and SoC environment
What’s Included?
- AMBA AXI3 Master/Slave Agent
- AMBA AXI3 Bus Monitor and Score boarding
- AMBA AXI3 Interconnect Model (Optional)
- Test Environment & Test Suite :
- Basic and Directed Protocol Tests
- Random Tests
- Error Scenario Tests
- Assertions & cover point Tests
- Integration Guide, User Manual and Release Notes
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Provider
- To create world class Verification IP Solutions
- To provide expert consultancy to ASIC & SoC Design companies
- To design SOCs from Architecture to Working Silicon
- To be the leading provider of Semiconductor IP Solutions
- To be a one-stop-shop for Design and Verification
- Customer Success
- Commitment to Quality
- Quality of Products
- Quality of Engineers
- Best in class Customer Support
- Ethics and Integrity
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Frequently asked questions about Protocol Bridge IP cores
What is AMBA AXI3 Verification IP?
AMBA AXI3 Verification IP is a Protocol Bridge IP core from Truechip Solutions listed on Semi IP Hub.
How should engineers evaluate this Protocol Bridge?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.