10-bit 1-channel constant power DAC
10-bit constant power DAC employs a current steering DAC architecture with control loop, which adjusts DAC input code to keep pow…
Overview
10-bit constant power DAC employs a current steering DAC architecture with control loop, which adjusts DAC input code to keep power dissipated in terminator constant. The block is easy to configure and operate, combining good accuracy and linearity. Several operation modes are available: constant power DAC, current DAC with output voltage monitoring, current DAC (manual mode), low-speed ADC. Output DAC current could be fed to one of two DAC outputs (DAC_OUT0 or DAC_OUT1) depending on Out_sel input.
Key features
- iHP SiGe BiCMOS 0.25 um
- Single 2.5 V supply voltage
- 22 mA full scale output current
- 0°C to 100°C operation
- 4 active operation modes
- Standby mode
Block Diagram
Applications
- Supply voltage stabilization systems
- Measurement and calibration systems
What’s Included?
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Analog
Provider
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Frequently asked questions about DAC IP cores
What is 10-bit 1-channel constant power DAC?
10-bit 1-channel constant power DAC is a DAC IP core from NTLab listed on Semi IP Hub.
How should engineers evaluate this DAC?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this DAC IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.