Synopsys and GLOBALFOUNDRIES Collaborate to Develop Broad Portfolio of DesignWare IP for 12LP FinFET Process

High-quality DesignWare Interface and Analog IP Optimized for High Performance and Low Power in AI, Cloud Computing, and Mobile SoCs

MOUNTAIN VIEW, Calif. -- June 4, 2019 -- Synopsys, Inc. (Nasdaq: SNPS) today announced its collaboration with GLOBALFOUNDRIES (GF) to develop a broad portfolio of DesignWare® IP, including Multi-Protocol 25G, USB 3.0 and 2.0, PCI Express® 2.0, DDR4, LPDDR4/4X, MIPI D-PHY, SD-eMMC, and Data Converters, for GF's 12-nanometer (nm) Leading-Performance (12LP) FinFET process technology. Synopsys' DesignWare IP on the GF 12LP process enables designers to implement the latest interface and analog IP solutions in their artificial intelligence (AI), cloud computing, mobile, and consumer system-on-chips (SoCs) on GF's 12LP technology, which delivers a 10 percent improvement in logic density and more than a 15 percent improvement in performance compared to previous FinFET generations. This collaboration is another extension to the long-standing relationship between the two companies, which has delivered DesignWare IP for GF's processes from 180-nm to 12-nm.

"In response to growing demand for differentiated, feature-rich FinFET offerings, we are collaborating with Synopsys to provide quality IP in GF's processes, enabling designers to deliver differentiated products to a broad set of market segments," said Mark Ireland, vice president of Ecosystem Partnerships at GF. "The combination of our 12LP process with 3D FinFET transistor technology and Synopsys' high-performance DesignWare IP allows our mutual customers to accelerate their time to volume production."

"As the leading provider of interface IP, Synopsys continues to collaborate with key foundries, such as GF, to deliver DesignWare IP solutions for the latest FinFET process technologies," said John Koeter, vice president of marketing for IP at Synopsys. "With Synopsys' DesignWare IP portfolio in GF's 12LP process, designers can efficiently integrate the necessary functionality into their complex SoCs while meeting the bandwidth and power requirements of their mobile and high-end computing applications."

Availability

The DesignWare Multi-Protocol 25G PHY and Data Converter IP solutions are available now. The DesignWare USB 3.0 and 2.0, PCI Express 2.0, DDR4, LPDDR4/4X, MIPI D-PHY, and SD-eMMC IP solutions are in development and scheduled to be available in the second half of 2019.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate prototyping, software development, and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits, and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support, and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit http://www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

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