Sidense 1T-OTP Helps Calibrate Aptina's Advanced Imaging Products
Sidense memory for TSMC's 65nm process helps Aptina provide customers with superior imaging technology
Ottawa, Canada – (February 21, 2012) – Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) one-time programmable (OTP) memory IP cores, announced that Aptina, a leading provider of CMOS image sensors and camera modules, is using Sidense's field-programmable 1T-OTP memory macros for several image sensor and camera module products for the mobile, consumer, automotive and surveillance markets. Developed for use at TSMC's 65nm low-power (LP) process node, the 1T-OTP macros provide a reliable and flexible memory solution in a small footprint to support calibration and optimization of image sensors in a chip, module or system environment.
"Aptina chose Sidense OTP for storing calibration and lens correction information in our image sensor and companion chip products for its small macro area, reliable field programmability to support correction in finished modules, and scalability to new process nodes for future product development," said Sion Quinlan, Aptina's Director of Circuit IP. "Because Sidense's OTP does not add any additional processing steps or masks to our sensor process, Aptina benefits with a cost and time savings."
Aptina products are used in a broad range of products including smartphones, tablets, laptops, digital and video cameras, as well as in surveillance, automotive, medical, video conferencing, and gaming applications.
"Acceptance by one of the industry's leading image sensor providers validates the use of our 1T-OTP memory for image sensor calibration and trimming in products targeting several high-volume and demanding market segments," said Xerxes Wania, President and CEO of Sidense. "We are very pleased to provide a key ingredient to Aptina for their leading image sensor and camera module products."
About Sidense Corp.
Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company's innovative one-transistor 1T-Fuse™
architecture provides the industry's smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (LNVM) IP solution. With over 90 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.
Sidense SiPROM, SLP and ULP memory products, embedded in over 190 customer designs, are available from 180nm down to 28nm and are scalable to 20nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com.
About Aptina
Aptina is a global provider of CMOS imaging solutions that enable Imaging Everywhere™. Using performance enhancing technologies like Aptina A-Pix™, DR-Pix™ and award winning MobileHDR™, Aptina has created a market-leading portfolio of image sensor products found in leading consumer electronics like smartphones, tablets, laptops, digital and video cameras, as well as applications in surveillance, automotive, medical, video conferencing, and gaming. Aptina drives innovation in the market with industry recognized products like the AR0331 surveillance image sensor and the 16MP APS-C DSLR sensor. Privately held, Aptina's investors include Riverwood Capital, TPG Capital and Micron Technology. For additional information on Aptina visit www.aptina.com
Related Semiconductor IP
- OTP
- 64x1 Bits OTP (One-Time Programmable) IP, TSMC 0.18um SiGe BiCMOS 1.8V/3.3V General Purpose Process
- 8Kx16 Bits OTP (One-Time Programmable) IP, DB HiTek AN180 1.8V / 5V Process
- 128x16 Bits OTP (One-Time Programmable) IP, DBHitek 0.13um BCD Process Platforms
- 8Kx8 Bits OTP (One-Time Programmable) IP, MXIC 0.18um 1.8V/5V Logic/BCD Process
Related News
- MIPI Alliance Releases Camera Security Specifications for Flexible End-to-End Protection of Automotive Image Sensor Data
- Aptina Unveils 8MP Complete Camera Solution
- Sidense 1T-OTP Memory Available in ON Semiconductor 180 nm Process Technology
- Lattice Semiconductor and Aptina Announce Dual Image Sensor Stereo Camera Reference Design for CES 2012
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers